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参数资料
型号： SIP2210DMP-MV-E3
厂商： VISHAY SILICONIX
元件分类： 固定正电压多路输出LDO稳压器
英文描述： DUAL OUTPUT, FIXED POSITIVE LDO REGULATOR, PDSO10
封装： 3 X 3 MM, LEAD FREE, MLP-10
文件页数： 4/11页
文件大小： 218K
代理商： SIP2210DMP-MV-E3
www.vishay.com
2
Document Number: 73441
S09-1455-Rev. D, 03-Aug-09
Vishay Siliconix
SiP2210
Notes:
a. Device mounted with all leads soldered or welded to PC board.
b. Derate 20 mW/°C above 70 °C.
c. Derate 23.5 mW/°C above 70 °C.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
ABSOLUTE MAXIMUM RATINGS
Parameter
Limit
Unit
VIN, VEN, to GND
- 0.3 to 7
V
Power Dissipation
MLP33-10 PowerPAKb
1600
mW
MLP44-16 PowerPAKc
1880
Storage Temperature
- 55 to 150
°C
Thermal Resistance (MLP10 PowerPAK)
50
°C/W
RECOMMENDED OPERATING RANGE
Parameter
Limit
Unit
Input Voltage Range
2.25 to 5.5
V
Enable Voltage Range
0 to 5.5
Operating Temperature Range TA
- 40 to 85
°C
Operating Temperature Range TJ
- 40 to 125
SPECIFICATIONS
Parameter
Symbol
Test Conditions Unless Specified
VIN = VOUT + 1 V
e, C
OUT = 1 F, IOUT = 100 A,
TA = 25 °C
Temp.a
Limits
Unit
Min.b
Typ.c
Max.b
Regulators
Output Voltage Accuracy
From Nominal VOUT
Room
- 1
1
%
Full
- 2
2
Output Voltage
Temperature Coefficient
Room
40
ppm/°C
Line Regulatione
VIN = VOUT + 1 V to 5.5 V
Room
- 0.3
0.2
0.3
%
Full
- 0.6
0.6
Load Regulation
IOUT = 100 A to 150 mA (LDO 1 and 2)
Room
0.2
1.0
IOUT = 100 A to 300 mA (LDO 2)
Room
1.5
Dropout Voltagef
VDROP
IOUT = 150 mA (LDO 1 and 2)
Room
120
190
mV
Full
250
IOUT = 300 mA (LDO 2)
Room
240
340
Full
420
Ground Pin Current
IG
IOUT1 = IOUT2 = 0 A
Room
48
65
A
IOUT1 = IOUT2 = 0 A
Full
80
IOUT1 = 150 mA, IOUT2 = 300 mA
Room
60
VEN < 0.4 V
Full
2.0
Sequence Time Delayd
tSEQ
Room
70
s
Output Voltage Noise
CBP = 0.01 F
30
Vrms
Ripple Rejection
f = 1 kHz, COUT = 1 F, CBP = 10 nF
Room
60
dB
f = 20 kHz, COUT = 1 F, CBP = 10 nF
Room
40
Inputs
EN, SW Input Voltage
VIL
Logic Low
Full
0.6
V
VIH
Logic High
Full
1.8
EN, SW Input Current
IIL
VIL < 0.6 V
Room
- 1
0.01
1
A
IIH
VIH > 1.8 V
Room
- 1
0.01
1
SET Pin Threshold Voltage
VTH(set)
POR = High
Room
1.25
V
SET Pin Current Source
VSET = 0 V
Room
0.75
1.25
1.75
A
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