参数资料
型号: SL15100ZIT
厂商: Silicon Laboratories Inc
文件页数: 1/16页
文件大小: 0K
描述: IC CLOCK SSCG 1PLL 2CH 8TSSOP
标准包装: 2,500
系列: EProClock®
类型: *
PLL: 带旁路
输入: 时钟,晶体
输出: 时钟
电路数: 1
比率 - 输入:输出: 1:2
差分 - 输入:输出: 无/无
频率 - 最大: 200MHz
除法器/乘法器: 是/无
电源电压: 2.25 V ~ 3.63 V
工作温度: -40°C ~ 85°C
安装类型: *
封装/外壳: *
供应商设备封装: *
包装: *
Rev 1.8, August 10, 2007
Page 1 of 16
400 West Cesar Chavez, Austin, TX 78701
1+(512) 416-8500
1+(512) 416-9669
www.silabs.com
SL15100
Key Features
Low power dissipation
- 7.7mA-typ at 66MHz and VDD=3.3V
- 6.8mA-typ at 66MHz and VDD=2.5V
Wide 2.5V to 3.3V +/-10% power supply range
Programmable outputs from 3 to 200MHz
Low Jitter
- 110ps at 66MHz
Programmable Center or Down Spread Modulation
from 0.25 to 5.0%
8 to 48 MHz external crystal range
8 to 166 MHz external clock range
Integrated internal voltage regulator
Programmable PD#/OE/SSON#/FS functions
Programmable CL at XIN and XOUT pins
Programmable output rise and fall times
Programmable modulation frequency from 30 to
120 kHz
Applications
Printers, MFPs
Digital Copiers
NBPCs and LCD Monitors
Routers, Servers and Switchers
HDTV and DVD-R/W
Description
The SL15100 a programmable low power Spread
Spectrum Clock Generator (SSCG) used for reducing
Electromagnetic Interference (EMI). The product is
designed using SpectraLinear proprietary EProClock
programmable phase-locked loop (PLL) and Spread
Spectrum Clock (SSC) technology to synthesize and
modulate the input clock. The modulated clock can
significantly reduce the measured EMI levels, and leading
to the compliance with regulatory agency requirements.
The output clock frequency, Spread %, output rise and fall
times, crystal load, modulation frequency and
PD#/OE/SSON#/FS functions can be programmed to meet
the needs of wide range of applications. The SL15100
operates from 2.5V to 3.3V power supply voltage range.
The product is offered in 8-pin TSSOP package with
commercial and industrial grades.
Refer to SL15101 for up to four (4) programmable clock
outputs and SL15L100/101 Programmable SSCG products
for 1.8V power supply operation.
Benefits
Peak EMI reduction of 8 to 16 dB
Fast time-to-market
Cost Reduction
Reduction of PCB layers
Eleminates the need for higher order crystals (Xtals)
and crystal oscillators (XOs)
Block Diagram
3
PLL with
Modulation Control
6
Programmable
Configuration
Register
2
4
8
300K
SSCLK1/REFCLK1
XIN/CLKIN
XOUT
SSON#/FS1
PD#/OE
Output
Dividers
and
MUX
7
SSCLK2/REFCLK2
PCin
PCout
1
5
VDD
VSS
V-Reg
To I/O
To
Core
Programmable Spread Spectrum Clock Generator (SSCG)
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