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参数资料
| 型号： | SL23EP08ZC-1HT |
| 厂商： | SILICON LABORATORIES |
| 元件分类： | 时钟及定时 |
| 英文描述： | 23EP SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| 封装： | 4.40 MM, ROHS COMPLIANT, TSSOP-16 |
| 文件页数： | 13/15页 |
| 文件大小： | 220K |
| 代理商： | SL23EP08ZC-1HT |
Rev 1.0, May 18, 2006
Page 7 of 15
SL23EP08
AC Electrical Specifications: VDD=3.3V+/-10% and 0°C to +70°C Operation (Commercial Grade)
Symbol Description
Condition
Min
Typ
Max
Unit
FOUT-1
Output Frequency
CL=30pf, All devices
10
-
160
MHz
FOUT-2
Output Frequency
CL=20pF, -1H and -5H versions
10
-
220
MHz
FOUT-2
Output Frequency
CL=15pF, -1,-2,-3 and -4 versions
10
-
200
MHz
DC-1
Duty Cycle. -1, -2, -3,-4,-1H
and -5H versions
CL=30pF, FOUT=66.6MHz and Measured
at VDD/2
40.0
50.0
60.0
%
DC-2
Duty Cycle, -1, -2, -3,-4,-1H
and -5H versions
CL=15pF, FOUT<66.6MHz and Measured
at VDD/2
45.0
50.0
55.0
%
DC-1
Duty Cycle. -1, -2, -3,-4,-1H
and -5H versions
CL=30pF, FOUT=120MHz and Measured
at VDD/2
TBD
%
DC-2
Duty Cycle. -1, -2, -3,-4,-1H
and -5H versions
CL=15pF, FOUT=120MHz and Measured
at VDD/2
TBD
%
tr/f-1
Rise and Fall Times. -1, -2, -
3, and -4 versions
Measured between 0.8V and 2.0V
CL=30pF
-
1.6
ns
tr/f-2
Rise and Fall Times. -1, -2, -
3, and -4 versions
Measured between 0.8V and 2.0V
CL=15pF
-
1.2
ns
tr/f-3
Rise and Fall Times. -1,1H
and -5H versions
Measured between 0.8V and 2.0V
CL=30pF
-
1.2
ns
tr/f-3
Rise and Fall Times. -1H and
-5H versions
Measured between 0.8V and 2.0V
CL=15pF
-
1.0
ns
SKW-1
Output-to-Output on same
bank A or B. All versions
All outputs are equally loaded. Measured
at VDD/2
-
60
150
ps
SKW-2
Output Bank-A to Bank-B
Skew. -1-4 and -5H
versions
All outputs are equally loaded. Measured
at VDD/2
-
60
150
ps
SKW-3
Output Bank-A to Bank-B
Skew. -1-4 and -5H
versions
All outputs are equally loaded. Measured
at VDD/2
-
130
300
ps
SKW-4
Device-to-Device Skew.
All versions
All outputs are equally loaded. Measured
at VDD/2 and FBK pin
-
180
500
ps
tCFD
CLKIN to FBK Rising Edge
Delay
All outputs are equally loaded. Measured
at VDD/2
-200
-
200
ps
t2
Delay Time, CLKIN Rising
Edge to CLKOUT Rising
Edge
(Measured at VDD/2)
[2]
PLL Bypass mode
1.5
–
4.4
ns
PLL enabled @ 3.3V
–100
–
100
ps
PLL enabled @2.5V
–200
–
200
ps
t3
Part-to-Part Skew
[2]
(Measured at VDD/2)
Measured at VDD/2. Any output to any
output, 3.3V supply
–
±150
ps
Measured at VDD/2. Any output to any
output, 2.5V supply
–
±300
ps
tLOCK
PLL Lock Time
Valid on all clock pins from VDD=2.97V
-
1.0
ms
相关PDF资料 |
PDF描述 |
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| SL23EP08SC-5H | 23EP SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| SL23EP08SI-1T | 23EP SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| SL23EP08SI-1 | 23EP SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| SL23EP09SC-1 | 23EP SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
| SL23EP09SC-1T | 23EP SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO16 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| SL23EP08ZC-1T | 功能描述:时钟缓冲器 10-133MHz 8 Out ZDB 3.3-2.5V Fout=Fin RoHS:否 制造商:Texas Instruments 输出端数量:5 最大输入频率:40 MHz 传播延迟（最大值）: 电源电压-最大:3.45 V 电源电压-最小:2.375 V 最大功率耗散: 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LLP-24 封装:Reel |
| SL23EP08ZI-1H | 制造商:SPECTRALINEAR 制造商全称:SPECTRALINEAR 功能描述:Low Jitter and Skew 10 to 220MHz Zero Delay Buffer (ZDB) |
| SL23EP08ZI-1HT | 制造商:SPECTRALINEAR 制造商全称:SPECTRALINEAR 功能描述:Low Jitter and Skew 10 to 220MHz Zero Delay Buffer (ZDB) |
| SL23EP09 | 制造商:SPECTRALINEAR 制造商全称:SPECTRALINEAR 功能描述:Low Jitter and Skew 10 to 220MHz Zero Delay Buffer (ZDB) |
| SL23EP09NZ | 制造商:SPECTRALINEAR 制造商全称:SPECTRALINEAR 功能描述:Low Jitter and Skew DC to 220MHz Clock Buffer |
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