参数资料
型号: SL28770ELCT
厂商: Silicon Laboratories Inc
文件页数: 15/22页
文件大小: 0K
描述: IC CLOCK CALPELLA CK505 32QFN
标准包装: 2,500
系列: EProClock®
类型: 时钟/频率发生器,多路复用器
PLL:
主要目的: Intel CPU 服务器
输入: 晶体
输出: HCSL,LVCMOS
电路数: 1
比率 - 输入:输出: 1:9
差分 - 输入:输出: 无/是
频率 - 最大: 133MHz
电源电压: 3.135 V ~ 3.465 V
工作温度: 0°C ~ 85°C
安装类型: *
封装/外壳: *
供应商设备封装: *
包装: *
SL28770
DOC#: SP-AP-0065 (Rev. AA)
Page 22 of 22
Document History Page
The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. Silicon
Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from the use of
information included herein. Additionally, Silicon Laboratories assumes no responsibility for the functioning of undescribed features or param-
eters. Silicon Laboratories reserves the right to make changes without further notice. Silicon Laboratories makes no warranty, representation or
guarantee regarding the suitability of its products for any particular purpose, nor does Silicon Laboratories assume any liability arising out of the
application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental
damages. Silicon Laboratories products are not designed, intended, or authorized for use in applications intended to support or sustain life, or
for any other application in which the failure of the Silicon Laboratories product could create a situation where personal injury or death may occur.
Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized application, Buyer shall indemnify and hold
Silicon Laboratories harmless against all claims and damages.
Document Title: SL28770 PC EProClock Generator for Intel Calpella Chipset
DOC#: SP-AP-0065 (Rev. AA)
REV.
ECR# Issue Date
Orig. of
Change
Description of Change
1.0
10/9/08
JMA
Initial Release
1.1
10/23/08
JMA
1. Changed operating temperature to 0-85C
2. Re-aligned ordering part number description
1.2
1/27/09
JMA
1. Updated Rev. ID
2. Uddated definition of Byte 6 bit 5 and 3
3. Updated Byte 13 and single-ended slew rate table
4. Udated Byte 14
5. Updated Feature description
6. Added less than symbol in power consumption value
7. Updated ordering part number
8. Changed package information
9. Changed Wireless Friendly Mode to 111
1.3
3/16/09
JMA
1. Added PC EProClock Programmed Technology in Feature section
2. Updated Block Diagram
3. Updated 27MHz slew rate measurement window
4. Updated power consumption
1.4
3/25/09
JMA
1. Updated Package information removed punch version with saw version
2. Updated TPeriod at 100MHz for CPU clocks
3. Updated Revision ID
4. Added Power down Spec
5. Added PC EProClock Technology description
6. Added CPU Skew
7. Removed 3-bit differential slew rate
8. Change SATA PLL from PLL2 to PLL4.
1.5
9/8/09
JMA
1. Removed Preliminary word
AA
1457
01/05/10
JMA
1. Added Note in package diagram
2. Updated text content
3. Added information on trace length in Figure 8
4. Removed CPU Driven Figures
5. Updated VDD_IO spec to 4.6V maximum value
6. Edited CK_PWRGD to CKPWRGD
7. Udpated MIL-STD to JEDEC Standard
8. Combine industiral and commerial
9. Changed Revision to be ISO compliant
10. Added CLKIN feature
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