- 您现在的位置：买卖IC网 > PDF目录69343 > SL28SRC02BZIT OTHER CLOCK GENERATOR, PDSO20 PDF资料下载
参数资料
| 型号： | SL28SRC02BZIT |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | OTHER CLOCK GENERATOR, PDSO20 |
| 封装： | 0.173 INCH, 0.65 MM PITCH, ROHS COMPLAINT, MO-153AC, TSSOP-20 |
| 文件页数： | 2/14页 |
| 文件大小： | 203K |
| 代理商： | SL28SRC02BZIT |
SL28SRC02
Rev 1.1
Page 10 of 14
AC Electrical Specifications
Parameter
Description
Condition
Min.
Max.
Unit
Crystal
TDC
XIN Duty Cycle
The device operates reliably with input
duty cycles up to 30/70 but the REF clock
duty cycle will not be within specification
47.5
52.5
%
TPERIOD
XIN Period
When XIN is driven from an external
clock source
69.841
71.0
ns
TR/TF
XIN Rise and Fall Times
Measured between 0.3VDD and 0.7VDD
–
10.0
ns
TCCJ
XIN Cycle to Cycle Jitter
As an average over 1-s duration
–
500
ps
SRC
TDC
SRC Duty Cycle
Measured at 0V differential
45
55
%
TPERIOD
100 MHz SRC Period
Measured at 0V differential @ 0.1s
9.99900
10.0010
ns
TPERIODSS
100 MHz SRC Period, SSC
Measured at 0V differential @ 0.1s
10.02406
10.02607
ns
TPERIODAbs
100 MHz SRC Absolute Period
Measured at 0V differential @ 1 clock
9.87400
10.1260
ns
TPERIODSSAbs 100 MHz SRC Absolute Period, SSC
Measured at 0V differential @ 1 clock
9.87406
10.1762
ns
TSKEW
SRC1 to SRC2
Measured at 0V differential
100
ps
TCCJ
SRC Cycle to Cycle Jitter
Measured at 0V differential
–
50
ps
RMSGEN1
Output PCIe* Gen1 REFCLK phase
jitter
BER = 1E-12 (including PLL BW 8 - 16
MHz, ζ = 0.54, Td=10 ns,
Ftrk=1.5 MHz)
0
108
ps
RMSGEN2
Output PCIe* Gen2 REFCLK phase
jitter
Includes PLL BW 8 - 16 MHz, Jitter
Peaking = 3dB, ζ = 0.54, Td=10 ns),
Low Band, F < 1.5MHz
0
3.0
ps
RMSGEN2
Output PCIe* Gen2 REFCLK phase
jitter
Includes PLL BW 8 - 16 MHz, Jitter
Peaking = 3dB, ζ = 0.54, Td=10 ns),
Low Band, F < 1.5MHz
0
3.1
ps
RMSGEN3
Output phase jitter impact – PCIe*
Gen3
Includes PLL BW 2 - 4 MHz,
CDR = 10MHz)
0
1.0
ps
LACC
SRC Long Term Accuracy
Measured at 0V differential
–
100
ppm
TR / TF
SRC Rising/Falling Slew Rate
Measured differentially from ±150 mV
2.5
8
V/ns
TRFM
Rise/Fall Matching
Measured single-endedly from ±75 mV
–
20
%
VHIGH
Voltage High
1.15
V
VLOW
Voltage Low
–0.3
–
V
VOX
Crossing Point Voltage at 0.7V Swing
300
550
mV
Tjphasepll
Phase Jitter
(PLL BW 8-16MHz, 5-16MHz)
RMS value
3.1
pS
ENABLE/DISABLE and SET-UP
TSTABLE
Clock Stabilization from Power-up
–
1.8
ms
TSS
Stopclock Set-up Time
10.0
–
ns
相关PDF资料 |
PDF描述 |
|---|---|
| SL38000ZC-XXX | PROC SPECIFIC CLOCK GENERATOR, PDSO28 |
| SL38000ZI-XXXT | PROC SPECIFIC CLOCK GENERATOR, PDSO28 |
| SL38160AZI-17AH | 148.5 MHz, VIDEO CLOCK GENERATOR, PDSO16 |
| SL38160AZC-23AH | 148.5 MHz, VIDEO CLOCK GENERATOR, PDSO16 |
| SLHNNWH511N0S0QRC3 | T-3 SINGLE COLOR LED, WHITE, 5.4 mm |
相关代理商/技术参数 |
参数描述 |
|---|---|
| SL28SRC02BZITR | 制造商:Silicon Laboratories Inc 功能描述: |
| SL28SRC04BZC | 功能描述:时钟发生器及支持产品 PCIE Clk Gen 14.318M Xin 4PCIE out Gen3 RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| SL28SRC04BZCT | 功能描述:时钟发生器及支持产品 PCIE Clk Gen 14.318M Xin 4PCIE out Gen3 RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| SL28SRC04BZI | 功能描述:时钟发生器及支持产品 PCIE Clk Gen 14.318M Xin 2PCIE out Gen3 RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| SL28SRC04BZIT | 功能描述:时钟发生器及支持产品 PCIE Clk Gen 14.318M Xin 2PCIE out Gen3 RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
发布紧急采购，3分钟左右您将得到回复。