参数资料
型号: SLE66C168PE
厂商: INFINEON TECHNOLOGIES AG
英文描述: Security & Chip Card ICs
中文描述: 安全
文件页数: 8/8页
文件大小: 59K
代理商: SLE66C168PE
SLE 66C168PE
Preliminary - Short Product Information
8 / 8
02.04
Security features:
Since the very beginning, security is an integrated part of Infineons product development, as proved by various
certificates (ITSEC, CC, Proton, VISA, ZKA, Mondex). The so called
“integral security concept”
for the 66P series
ensures:
A secret storage of any confidential code, data and keys
Protection against side channel attacks such as: Simple Power Analysis (SPA) , Differential Power Analysis (DPA),
Protection against Differential Fault Analysis (DFA), Electromagnetic Emanation Attack (EMA) and other possible
HW or SW attacks
Peripherals:
The CRC module allows the easy generation of checksums according to ISO/IEC 3309 (16-Bit-CRC). To
minimize the overall power consumption, the chip card controller IC offers a sleep mode. The UART supports the half-
duplex transmission protocols T=0 and T=1 according to ISO/IEC 7816-3. All relevant transmission parameters can be
adjusted by software, as e.g. the clock division factor, direct/inverse convention and the number of stop bits. Additionally,
the I/O port can be driven by communication routines realized in software.
The HW-DES module supports symmetric crypto algorithms according to the Data Encryption Standard in the Electronic
Code Book Mode.
The random number generator (RNG) is able to supply the CPU with true random numbers on all conditions.
The advanced sensor concept includes various sensors for any kind of attack scenarios and even more important a “Life
Test ” for sensors.
As an important feature, the chip provides an on-chip security, which fulfills the strong security requirements of a
Common Criteria evaluation at an EAL5+ level.
In conclusion, the SLE 66C168PE fulfills all the requirements of today's chip card applications and is especially designed
for GSM, SDA payment and PayTV applications.
The SLE66C168PE integrates outstanding memory sizes, additional peripherals in combination with enhanced
performance and optimized power consumption on a minimized die size.
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