- 您现在的位置：买卖IC网 > PDF目录372149 > SM320C6201BS14 (Texas Instruments, Inc.) FLOATING-POINT DIGITAL SIGNAL PROCESSOR PDF资料下载
参数资料
| 型号： | SM320C6201BS14 |
| 厂商： | Texas Instruments, Inc. |
| 元件分类： | 数字信号处理 |
| 英文描述： | FLOATING-POINT DIGITAL SIGNAL PROCESSOR |
| 中文描述： | 浮点数字信号处理器 |
| 文件页数： | 43/64页 |
| 文件大小： | 939K |
| 代理商： | SM320C6201BS14 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页当前第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页
SGUS030B
–
APRIL 2000
–
REVISED MAY 2001
43
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
–
1443
RESET TIMING
timing requirements for reset (see Figure 25)
NO.
’
C6701-14
’
C6701-16
UNIT
MIN
MAX
1
tw(RESET)
Width of the RESET pulse (PLL stable)
*10
CLKOUT1
cycles
μ
s
Width of the RESET pulse (PLL needs to sync up)
*250
This parameter applies to CLKMODE x1 when CLKIN is stable and applies to CLKMODE x4 when CLKIN and PLL are stable.
*This parameter is not tested.
This parameter only applies to CLKMODE x4. The RESET signal is not connected internally to the clock PLL circuit. The PLL, however, may
need up to 250
μ
s to stabilize following device powerup or after PLL configuration has been changed. During that time, RESET must be asserted
to ensure proper device operation. See the
clock PLL
section for PLL lock times.
switching characteristics during reset
§
(see Figure 25)
NO.
PARAMETER
’
C6701-14
’
C6701-16
UNIT
MIN
MAX
2
tR(RESET)
Response time to change of value in RESET signal
*1
CLKOUT1
cycles
3
td(CKO1H-CKO2IV)
td(CKO1H-CKO2V)
td(CKO1H-SDCLKIV)
td(CKO1H-SDCLKV)
td(CKO1H-SSCKIV)
td(CKO1H-SSCKV)
td(CKO1H-LOWIV)
td(CKO1H-LOWV)
td(CKO1H-HIGHIV)
td(CKO1H-HIGHV)
td(CKO1H-ZHZ)
td(CKO1H-ZV)
§
Low group consists of:
High group consists of:
Z group consists of:
Delay time, CLKOUT1 high to CLKOUT2 invalid
*
–
1
ns
4
Delay time, CLKOUT1 high to CLKOUT2 valid
*10
ns
5
Delay time, CLKOUT1 high to SDCLK invalid
*
–
1
ns
6
Delay time, CLKOUT1 high to SDCLK valid
*10
ns
7
Delay time, CLKOUT1 high to SSCLK invalid
*
–
1
ns
8
Delay time, CLKOUT1 high to SSCLK valid
*10
ns
9
Delay time, CLKOUT1 high to low group invalid
*
–
1
ns
10
Delay time, CLKOUT1 high to low group valid
*10
ns
11
Delay time, CLKOUT1 high to high group invalid
*
–
1
ns
12
Delay time, CLKOUT1 high to high group valid
*10
ns
13
Delay time, CLKOUT1 high to Z group high impedance
*
–
1
ns
14
Delay time, CLKOUT1 high to Z group valid
*10
ns
IACK, INUM[3:0], DMAC[3:0], PD, TOUT0, and TOUT1.
HRDY and HINT.
EA[21:2], ED[31:0], CE[3:0], BE[3:0], ARE, AWE, AOE, SSADS, SSOE, SSWE, SDA10, SDRAS, SDCAS,
SDWE, HD[15:0], CLKX0, CLKX1, FSX0, FSX1, DX0, DX1, CLKR0, CLKR1, FSR0, and FSR1.
*This parameter is not tested.
相关PDF资料 |
PDF描述 |
|---|---|
| SM320C6201BS16 | FLOATING-POINT DIGITAL SIGNAL PROCESSOR |
| SM320C6201BW14 | FLOATING-POINT DIGITAL SIGNAL PROCESSOR |
| SM320C6201BW16 | FLOATING-POINT DIGITAL SIGNAL PROCESSOR |
| SM320C6203S14 | FLOATING-POINT DIGITAL SIGNAL PROCESSOR |
| SM320C6203S16 | FLOATING-POINT DIGITAL SIGNAL PROCESSOR |
相关代理商/技术参数 |
参数描述 |
|---|---|
| SM320C6201BS16 | 制造商:TI 制造商全称:Texas Instruments 功能描述:FLOATING-POINT DIGITAL SIGNAL PROCESSOR |
| SM320C6201BW14 | 制造商:TI 制造商全称:Texas Instruments 功能描述:FLOATING-POINT DIGITAL SIGNAL PROCESSOR |
| SM320C6201BW16 | 制造商:TI 制造商全称:Texas Instruments 功能描述:FLOATING-POINT DIGITAL SIGNAL PROCESSOR |
| SM320C6201-EP | 制造商:TI 制造商全称:Texas Instruments 功能描述:FIXED-POINT DIGITAL SIGNAL PROCESSOR |
| SM320C6201GJCA20EP | 功能描述:数字信号处理器和控制器 - DSP, DSC Fxd-pt Dig Sig Proc Mil enhanced RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT |
发布紧急采购，3分钟左右您将得到回复。