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参数资料
| 型号： | SM320C6701S14 |
| 厂商： | Texas Instruments, Inc. |
| 元件分类： | 数字信号处理 |
| 英文描述： | FLOATING-POINT DIGITAL SIGNAL PROCESSOR |
| 中文描述： | 浮点数字信号处理器 |
| 文件页数： | 8/64页 |
| 文件大小： | 939K |
| 代理商： | SM320C6701S14 |
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SGUS030B
–
APRIL 2000
–
REVISED MAY 2001
8
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
–
1443
Signal Descriptions
SIGNAL
TYPE
DESCRIPTION
NAME
NO.
CLOCK/PLL
CLKIN
A14
I
Clock Input
CLKOUT1
Y6
O
Clock output at full device speed
CLKOUT2
V9
O
Clock output at half of device speed
CLKMODE1
B17
I
Clock mode select
Selects whether the output clock frequency = input clock freq x4 or x1
PLL frequency range (3, 2, and 1)
The target range for CLKOUT1 frequency is determined by the 3-bit value of the PLLFREQ pins.
CLKMODE0
C17
PLLFREQ3
C13
PLLFREQ2
G11
I
PLLFREQ1
PLLV
PLLG
F11
D12
A
§
A
§
A
§
PLL analog VCC connection for the low-pass filter
PLL analog GND connection for the low-pass filter
G10
PLLF
C12
PLL low-pass filter connection to external components and a bypass capacitor
JTAG EMULATION
TMS
K19
I
JTAG test port mode select (features an internal pull-up)
TDO
R12
O/Z
JTAG test port data out
TDI
R13
I
JTAG test port data in (features an internal pull-up)
TCK
M20
I
JTAG test port clock
TRST
N18
I
JTAG test port reset (features an internal pull-down)
Emulation pin 1, pull-up with a dedicated 20-k
resistor
Emulation pin 0, pull-up with a dedicated 20-k
resistor
RESET AND INTERRUPTS
EMU1
R20
I/O/Z
EMU0
T18
I/O/Z
RESET
J20
I
Device reset
NMI
K21
I
Nonmaskable interrupt
Edge-driven (rising edge)
EXT_INT7
R16
EXT_INT6
P20
I
External interrupts
External interru ts
Edge-driven (rising edge)
EXT_INT5
R15
EXT_INT4
R18
IACK
R11
O
Interrupt acknowledge for all active interrupts serviced by the CPU
INUM3
T19
INUM2
T20
O
Active interrupt identification number
Valid during IACK for all active interrupts (not just external)
Encoding order follows the interrupt service fetch packet ordering
Encoding order follows the interru t service fetch acket ordering
INUM1
T14
INUM0
T16
LITTLE ENDIAN/BIG ENDIAN
LENDIAN
G20
I
If high, selects little-endian byte/half-word addressing order within a word
If low, selects big-endian addressing
POWER DOWN STATUS
PD
I = Input, O = Output, Z = High Impedance, S = Supply Voltage, GND = Ground
PLLV and PLLG signals are not part of external voltage supply or ground. See the CLOCK/PLL documentation for information on how to connect
those pins.
§
A = Analog Signal (PLL Filter)
For emulation and normal operation, pull up EMU1 and EMU0 with a dedicated 20-k
resistor. For boundary scan, pull down EMU1 and EMU0
with a dedicated 20-k
resistor.
D19
O
Power-down mode 2 or 3 (active if high)
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相关代理商/技术参数 |
参数描述 |
|---|---|
| SM320C6701S16 | 制造商:TI 制造商全称:Texas Instruments 功能描述:FLOATING-POINT DIGITAL SIGNAL PROCESSOR |
| SM320C6701W14 | 制造商:TI 制造商全称:Texas Instruments 功能描述:FLOATING-POINT DIGITAL SIGNAL PROCESSOR |
| SM320C6701W16 | 制造商:TI 制造商全称:Texas Instruments 功能描述:FLOATING-POINT DIGITAL SIGNAL PROCESSOR |
| SM320C6701ZMBW14 | 功能描述:数字信号处理器和控制器 - DSP, DSC Floating Point Dig Signal Proc Military RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT |
| SM320C6711B-EP | 制造商:TI 制造商全称:Texas Instruments 功能描述:FLOATING-POINT DIGTAL SIGNAL PROCESSORS |
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