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参数资料
| 型号： | SN54ABT823W |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 总线收发器 |
| 英文描述： | ABT SERIES, 9-BIT DRIVER, TRUE OUTPUT, CDFP24 |
| 封装： | CERAMIC, DFP-24 |
| 文件页数： | 1/10页 |
| 文件大小： | 161K |
| 代理商： | SN54ABT823W |
SN54ABT823, SN74ABT823
9-BIT BUS-INTERFACE FLIP-FLOPS
WITH 3-STATE OUTPUTS
SCBS158E – JANUARY 1991 – REVISED MAY 1997
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D State-of-the-Art EPIC-ΙΙB BiCMOS Design
Significantly Reduces Power Dissipation
D ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
D Latch-Up Performance Exceeds 500 mA Per
JEDEC Standard JESD-17
D Typical VOLP (Output Ground Bounce) < 1 V
at VCC = 5 V, TA = 25°C
D High-Impedance State During Power Up
and Power Down
D High-Drive Outputs (–32-mA IOH, 64-mA IOL)
D Buffered Control Inputs to Reduce
dc Loading Effects
D Package Options Include Plastic
Small-Outline (DW) and Shrink
Small-Outline (DB) Packages, Ceramic Chip
Carriers (FK) and Flatpacks (W), and
Standard Plastic (NT) and Ceramic (JT)
DIPs
description
These 9-bit flip-flops feature 3-state outputs
designed specifically for driving highly capacitive
or relatively low-impedance loads. They are
particularly suitable for implementing wider buffer
registers, I/O ports, bidirectional bus drivers with
parity, and working registers.
With the clock-enable (CLKEN) input low, the nine
D-type edge-triggered flip-flops enter data on the
low-to-high transitions of the clock. Taking CLKEN
high disables the clock buffer, thus latching the
outputs. Taking the clear (CLR) input low causes
the nine Q outputs to go low, independently of the
clock.
A buffered output-enable (OE) input can be used to place the nine outputs in either a normal logic state (high
or low logic level) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive
the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines
without need for interface or pullup components.
When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 2.1 V, OE should be tied to VCC through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN54ABT823 is characterized for operation over the full military temperature range of –55
°C to 125°C. The
SN74ABT823 is characterized for operation from –40
°C to 85°C.
Copyright
1997, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC-
ΙΙB is a trademark of Texas Instruments Incorporated.
SN54ABT823 . . . JT OR W PACKAGE
SN74ABT823 . . . DB, DW, OR NT PACKAGE
(TOP VIEW)
SN54ABT823 . . . FK PACKAGE
(TOP VIEW)
32 1 28 27
12 13
5
6
7
8
9
10
11
25
24
23
22
21
20
19
3Q
4Q
5Q
NC
6Q
7Q
8Q
3D
4D
5D
NC
6D
7D
8D
426
14 15 16 17 18
9D
CLR
GND
NC
CLK
CLKEN
9Q
2D
1D
OE
NC
1Q
2Q
V
CC
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
OE
1D
2D
3D
4D
5D
6D
7D
8D
9D
CLR
GND
VCC
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
9Q
CLKEN
CLK
NC – No internal connection
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| SN54ABT8245 | 制造商:TI 制造商全称:Texas Instruments 功能描述:SCAN TEST DEVICES WITH OCTAL BUS TRANSCEIVERS |
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| SN54ABT8245_08 | 制造商:TI 制造商全称:Texas Instruments 功能描述:SCAN TEST DEVICES WITH OCTAL BUS TRANSCEIVERS |
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