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参数资料
| 型号： | SN54F86FK |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 门电路 |
| 英文描述： | F/FAST SERIES, QUAD 2-INPUT XOR GATE, CQCC20 |
| 封装： | CERAMIC, LCC-20 |
| 文件页数： | 4/8页 |
| 文件大小： | 156K |
| 代理商： | SN54F86FK |
SN54F86, SN74F86
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES
SDFS019B – JANUARY 1989 – REVISED JANUARY 1997
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
Test
Point
R1
CL
(see Note A)
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
LOAD CIRCUIT FOR
3-STATE AND OPEN-COLLECTOR OUTPUTS
R1
S1
7 V (tPZL, tPLZ, O.C.)
Open
(all others)
From Output
Under Test
Test
Point
R2
CL
(see Note A)
RL = R1 = R2
1.5 V
3 V
0 V
th
tsu
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Timing Input
(see Note C)
Data Input
(see Note C)
1.5 V
3 V
0 V
High-Level
Pulse
(see Note C)
Low-Level
Pulse
tw
VOLTAGE WAVEFORMS
PULSE DURATION
1.5 V
tPHL
tPLH
tPHL
Input
(see Note C)
Out-of-Phase
Output
(see Note E)
1.5 V
3 V
0 V
VOL
VOH
VOL
In-Phase
Output
(see Note E)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES (see Note D)
tPHZ
tPLZ
0.3 V
tPZL
tPZH
1.5 V
3 V
0 V
Output
Control
(low-level enable)
Waveform 1
(see Notes B and E)
Waveform 2
(see Notes B and E)
0 V
VOH
VOL
3.5 V
0.3 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR
≤ 1 MHz, tr = tf ≤ 2.5 ns, duty cycle = 50%.
D. When measuring propagation delay times of 3-state outputs, switch S1 is open.
E. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuits and Voltage Waveforms
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