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参数资料
| 型号： | SN54HCT74W |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 锁存器 |
| 英文描述： | HCT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDFP14 |
| 封装： | CERAMIC, DFP-14 |
| 文件页数： | 6/8页 |
| 文件大小： | 185K |
| 代理商： | SN54HCT74W |
Product Folder: SN74HCT74, Dual D-Type Positive-Edge-Triggered Flip-Flops With Clear and Preset
PRODUCT FOLDER | PRODUCT INFO: FEATURES | DESCRIPTION | DATASHEETS | PRICING/AVAILABILITY/PKG | SAMPLES
PRODUCT SUPPORT: TRAINING
SN74HCT74, Dual D-Type Positive-Edge-Triggered Flip-Flops With Clear and Preset
DEVICE STATUS: ACTIVE
PARAMETER NAME SN54HCT74 SN74HCT74
Voltage Nodes (V) 5
5
Vcc range (V)
4.5 to 5.5
Input Level
TTL
Output Level
CMOS
Output Drive (mA)
-4/4
Output
3S
No. of Bits
2
Static Current
0.04
th (ns)
0
tpd max (ns)
31
tsu (ns)
14
FEATURES
q
Inputs Are TTL-Voltage Compatible
q
Package Options Include Plastic Small-Outline (D), Thin Shrink Small-Outline (PW), and Ceramic Flat (W) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-
mil DIPs
DESCRIPTION
The 'HCT74 contain two independent D-type positive-edge-triggered flip-flops. A low level at the preset (PRE\) or clear (CLR\) inputs sets or resets the outputs regardless of the levels of the other
inputs. When PRE\ and CLR\ are inactive (high), data at the data (D) input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock (CLK) pulse.
Clock triggering occurs at a voltage level and is not directly related to the rise time of CLK. Following the hold-time interval, data at the D input may be changed without affecting the levels at the
outputs.
The SN54HCT74 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74HCT74 is characterized for operation from -40°C to 85°C.
TECHNICAL DOCUMENTS
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DATASHEET
APPLICATION NOTES
View Application Notes for Digital Logic
file:///H|/imaging/BITTING/cpl/20020930_1/09272002_10/TXII/09272002_HTML/sn74hct74.html (1 of 3) [Oct-04-2002 5:23:17 PM]
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