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参数资料
| 型号： | SN54LS293J |
| 厂商： | ON SEMICONDUCTOR |
| 元件分类： | 计数器 |
| 英文描述： | Octal D-Type Flip-Flop with 3-State Outputs; Package: 20 LEAD PDIP; No of Pins: 20; Container: Rail; Qty per Container: 18 |
| 中文描述： | LS SERIES, ASYN NEGATIVE EDGE TRIGGERED 3-BIT UP BINARY COUNTER, CDIP14 |
| 封装： | CERAMIC, DIP-14 |
| 文件页数： | 6/7页 |
| 文件大小： | 162K |
| 代理商： | SN54LS293J |
SN74LS290
http://onsemi.com
6
AC CHARACTERISTICS (TA = 25°C, VCC = 5.0 V, CL = 15 pF)
Symbol
Parameter
Limits
Unit
LS290
LS293
Min
Typ
Max
Min
Typ
Max
fMAX
CP0 Input Clock Frequency
32
MHz
fMAX
CP1 Input Clock Frequency
16
MHz
tPLH
tPHL
Propagation Delay,
CP0 Input to Q0 Output
10
12
16
18
10
12
16
18
ns
tPLH
tPHL
CP0 Input to Q3 Output
32
34
48
50
46
70
ns
tPLH
tPHL
CP1 Input to Q1 Output
10
14
16
21
10
14
16
21
ns
tPLH
tPHL
CP1 Input to Q2 Output
21
23
32
35
21
23
32
35
ns
tPLH
tPHL
CP1 Input to Q3 Output
21
23
32
35
34
51
ns
tPHL
MS Input to Q0 and Q3 Outputs
20
30
ns
tPHL
MS Input to Q1 and Q2 Outputs
26
40
ns
tPHL
MR Input to Any Output
26
40
26
40
ns
AC SETUP REQUIREMENTS (TA = 25°C, VCC = 5.0 V)
Symbol
Parameter
Limits
Unit
LS290
LS293
Min
Max
Min
Max
tW
CP0 Pulse Width
15
ns
tW
CP1 Pulse Width
30
ns
tW
MS Pulse Width
15
ns
tW
MR Pulse Width
15
ns
trec
Recovery Time MR to CP
25
ns
RECOVERY TIME (trec) is defined as the minimum time required between the end of the reset pulse and the clock transition form HIGH-to-LOW in order to
recognize and transfer HIGH data to the Q outputs.
Figure 1
*CP
Q
1.3 V
tPHL
tPLH
Figure 2
Figure 3
1.3 V
MR & MS
CP
Q
tPHL
tPLH
MS
CP
Q0 V Q3
(LS290)
*The number of Clock Pulses required between the tPHL and tPLH measurements can be determined from the appropriate Truth Tables.
AC WAVEFORMS
tW
trec
tW
trec
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