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| 型号： | SN54LV573J |
| 厂商： | Texas Instruments, Inc. |
| 英文描述： | Octal 3-State Non-Inverting Transparent Latch; Package: SOIC-20 WB; No of Pins: 20; Container: Tape and Reel; Qty per Container: 1000 |
| 中文描述： | 八路透明D类锁存器具有三态输出 |
| 文件页数： | 2/7页 |
| 文件大小： | 133K |
| 代理商： | SN54LV573J |
SN54LV573, SN74LV573
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCLS198B – FEBRUARY 1993 – REVISED APRIL 1996
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
FUNCTION TABLE
(each latch)
INPUTS
OUTPUT
Q
OE
L
LE
H
D
H
H
L
H
L
L
L
L
X
Q0
Z
H
X
X
logic symbol
logic diagram (positive logic)
OE
LE
1D
2
1D
3
2D
4
3D
5
4D
6
5D
C1
11
1Q
19
2Q
18
3Q
17
4Q
16
5Q
15
6Q
14
7Q
13
8Q
12
7
6D
8
7D
9
8D
EN
1
OE
LE
1D
1Q
1
11
2
19
To Seven Other Channels
C1
1D
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for DB, DW, J, PW, and W packages.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
Input voltage range, V
I
(see Note 1)
Output voltage range, V
O
(see Notes 1 and 2)
Input clamp current, I
IK
(V
I
< 0 or V
I
> V
CC
)
Output clamp current, I
OK
(V
O
< 0 or V
O
> V
CC
)
Continuous output current, I
O
(V
O
= 0 to V
CC
)
Continuous current through V
CC
or GND
Maximum power dissipation at T
A
= 55
°
C (in still air) (see Note 3):DB package
–0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
–0.5 V to V
CC
+ 0.5 V
–0.5 V to V
CC
+ 0.5 V
±
20 mA
±
50 mA
±
35 mA
±
70 mA
0.6 W
1.6 W
0.7 W
. . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . .
DW package
PW package
Storage temperature range, T
stg
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. This value is limited to 7 V maximum.
3. The maximum package power dissipation is calculated using a junction temperature of 150
°
C and a board trace length of 750 mils.
–65
°
C to 150
°
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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