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| 型号： | SN54LV573W |
| 厂商： | Texas Instruments, Inc. |
| 英文描述： | Octal 3-State Non-Inverting Transparent Latch; Package: SOIC-20 WB; No of Pins: 20; Container: Tape and Reel; Qty per Container: 1000 |
| 中文描述： | 八路透明D类锁存器具有三态输出 |
| 文件页数： | 6/7页 |
| 文件大小： | 133K |
| 代理商： | SN54LV573W |
SN54LV573, SN74LV573
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCLS198B – FEBRUARY 1993 – REVISED APRIL 1996
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
Vm
th
tsu
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT
S1
Vz
Open
GND
1 k
1 k
Data Input
Timing Input
Vm
Vi
0 V
Vm
Vm
Vi
0 V
Vi
0 V
Vm
Vm
tw
Input
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR
≤
10 MHz, ZO = 50
, tr
≤
2.5 ns, tf
≤
2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
Figure 1. Load Circuit and Voltage Waveforms
VOLTAGE WAVEFORMS
PULSE DURATION
tPLH
tPHL
tPHL
tPLH
VOH
VOH
VOL
VOL
Vm
Vm
Vi
0 V
Vm
Vm
Input
Vm
Output
Control
Output
Waveform 1
S1 at Vz
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
VOL
VOH
tPZL
tPZH
tPLZ
tPHZ
Vm
Vm
0.5
×
Vz
0 V
Vm
VOL + 0.3 V
Vm
VOH – 0.3 V
0 V
Vi
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
Output
Output
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
Vz
GND
TEST
S1
0.5
×
VCC
VCC
2
×
VCC
1.5 V
2.7 V
6 V
WAVEFORM
CONDITION
Vm
Vi
Vz
VCC = 4.5 V
to 5.5 V
VCC = 2.7 V
to 3.6 V
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