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参数资料
| 型号： | SN74ABTH162460DLR |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 总线收发器 |
| 英文描述： | ABT SERIES, 4-BIT EXCHANGER, TRUE OUTPUT, PDSO56 |
| 封装： | 0.300 INCH, GREEN, PLASTIC, SSOP-56 |
| 文件页数： | 8/15页 |
| 文件大小： | 417K |
| 代理商： | SN74ABTH162460DLR |
SN54ABTH162460, SN74ABTH162460
4-TO-1 MULTIPLEXED/DEMULTIPLEXED REGISTERED TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS241E – FEBRUARY 1993 – REVISED MAY 1997
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description (continued)
Address and/or data information can be stored using the internal storage latches/flip-flops. The latch-enable
(LEB1–LEB4, LEBA, and LEAB1–LEAB4) and clock/clock-enable (CLK/CLKEN) inputs are used to control data
storage. When either one of the latch-enable inputs is high, the latch is transparent (clock is a don’t care as long
as the latch enable is high). When the latch-enable input goes low (providing that the clock does not transit from
low to high), the data present at the inputs is latched and remains latched until the latch-enable input is returned
high. When the clock enable is low and the corresponding latch enable is low, data can be clocked on the
low-to-high transition of the clock. When either the clock enable or the corresponding latch enable is high, the
clock is a don’t care.
Four select (SEL0, SEL1, CE_SEL0, and CE_SEL1) pins are provided to multiplex data (A port), or to select
one of four clock enables (B port). This allows the user the flexibility of controlling one bit at a time.
The B-port outputs, which are designed to sink up to 12 mA, include equivalent 25-
series resistors to reduce
overshoot and undershoot.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 2.1 V, OE should be tied to VCC through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN54ABTH162460 is characterized for operation over the full military temperature range of –55
°C to
125
°C. The SN74ABTH162460 is characterized for operation from –40°C to 85°C.
Function Tables
A-TO-B OUTPUT ENABLE
INPUTS
OUTPUT
OEB
OEBn
Bn
H
Z
H
LZ
L
HZ
L
Active
n = 1, 2, 3, 4
A-TO-B STORAGE
(assuming OEB = L, OEBn = L)
INPUTS
OUTPUTS
CLKENAB
CE_SEL1
CE_SEL0
CLKAB
LEAB1
LEAB2
LEAB3
LEAB4
B1
B2
B3
B4
X
H or L
H
L
A
A0
X
H or L
H
L
A
AA
A0
L
X
L
LLLL
A0
L
LL
↑
LLLL
A
A0
L
LH
↑
LLLL
A0
AA0
A0
L
HL
↑
LLLL
A0
AA0
L
HH
↑
LLLL
A0
A
H
X
↑
L
A0
This table does not cover all the latch-enable cases since they have similar results.
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相关代理商/技术参数 |
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| SN74ABTH16260DL | 功能描述:闭锁 D Type RoHS:否 制造商:Micrel 电路数量:1 逻辑类型:CMOS 逻辑系列:TTL 极性:Non-Inverting 输出线路数量:9 高电平输出电流: 低电平输出电流: 传播延迟时间: 电源电压-最大:12 V 电源电压-最小:5 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:SOIC-16 封装:Reel |
| SN74ABTH16260DLG4 | 功能描述:闭锁 D Type RoHS:否 制造商:Micrel 电路数量:1 逻辑类型:CMOS 逻辑系列:TTL 极性:Non-Inverting 输出线路数量:9 高电平输出电流: 低电平输出电流: 传播延迟时间: 电源电压-最大:12 V 电源电压-最小:5 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:SOIC-16 封装:Reel |
| SN74ABTH16260DLR | 功能描述:闭锁 D Type RoHS:否 制造商:Micrel 电路数量:1 逻辑类型:CMOS 逻辑系列:TTL 极性:Non-Inverting 输出线路数量:9 高电平输出电流: 低电平输出电流: 传播延迟时间: 电源电压-最大:12 V 电源电压-最小:5 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:SOIC-16 封装:Reel |
| SN74ABTH16460DGGR | 功能描述:总线收发器 4/1 Mltplx/DeMltplx Trncvr W/3-St Otpt RoHS:否 制造商:Fairchild Semiconductor 逻辑类型:CMOS 逻辑系列:74VCX 每芯片的通道数量:16 输入电平:CMOS 输出电平:CMOS 输出类型:3-State 高电平输出电流:- 24 mA 低电平输出电流:24 mA 传播延迟时间:6.2 ns 电源电压-最大:2.7 V, 3.6 V 电源电压-最小:1.65 V, 2.3 V 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-48 封装:Reel |
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