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参数资料
| 型号： | SN74AC11651DWR |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 总线收发器 |
| 英文描述： | AC SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDSO28 |
| 封装： | PLASTIC, SOIC-28 |
| 文件页数： | 6/9页 |
| 文件大小： | 142K |
| 代理商： | SN74AC11651DWR |
74AC11651
OCTAL BUS TRANSCEIVER AND REGISTER
WITH 3-STATE OUTPUTS
SCAS135 – MARCH 1990 – REVISED APRIL 1993
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
timing requirements over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V
(unless otherwise noted) (see Figure 2)
TA = 25°C
MIN
MAX
UNIT
MIN
MAX
MIN
MAX
UNIT
fclock
Clock frequency
0
45
0
45
MHz
tw
Pulse duration, CLK high or low
10
ns
tsu
Setup time, A or B before CLKAB
↑ or CLKBA↑
6.5
ns
th
Hold time, A or B after CLKAB
↑ or CLKBA↑
0
ns
timing requirements over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V
(unless otherwise noted) (see Figure 2)
TA = 25°C
MIN
MAX
UNIT
MIN
MAX
MIN
MAX
UNIT
fclock
Clock frequency
0
90
0
90
MHz
tw
Pulse duration, CLK high or low
5.5
ns
tsu
Setup time, A or B before CLKAB
↑ or CLKBA↑
4.5
ns
th
Hold time, A or B after CLKAB
↑ or CLKBA↑
0.5
ns
switching characteristics over recommended operating free-air temperature range,
VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 2)
PARAMETER
FROM
TO
TA = 25°C
MIN
MAX
UNIT
PARAMETER
(INPUT)
(OUTPUT)
MIN
TYP
MAX
MIN
MAX
UNIT
fmax
45
MHz
tPLH
AorB
BorA
3.2
7.7
12.1
3.2
14
ns
tPHL
A or B
B or A
4.3
9.5
14.6
4.3
16.1
ns
tPLH
CLKBA or CLKAB
AorB
4.6
9.8
15
4.6
17.2
ns
tPHL
CLKBA or CLKAB
A or B
5.4
11.5
17.5
5.4
19.2
ns
tPLH
SBA or SAB
AorB
3.8
8.6
13.3
3.8
15.3
ns
tPHL
(A or B high)
A or B
4.8
10.2
15.5
4.8
17.1
ns
tPLH
SBA or SAB
AorB
3.4
8.1
12.7
3.4
14.6
ns
tPHL
(A or B low)
A or B
5
10.3
15.5
5
17.1
ns
tPZH
OEBA
A
4.6
9.8
14.9
4.6
16.9
ns
tPZL
OEBA
A
5.3
12.1
18.9
5.3
21.3
ns
tPHZ
OEBA
A
4.4
6.6
8.8
4.4
9.2
ns
tPLZ
OEBA
A
3.8
5.8
7.8
3.8
8.1
ns
tPZH
OEAB
B
4.9
10.2
15.5
4.9
17.6
ns
tPZL
OEAB
B
5.5
12.2
18.8
5.5
21.2
ns
tPHZ
OEAB
B
4.4
6.7
8.9
4.4
9.3
ns
tPLZ
OEAB
B
3.5
5.7
7.8
3.5
8
ns
These parameters are measured with the internal output state of the storage register opposite to that of the bus input.
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