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参数资料
| 型号： | SN74AHC74DR |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 锁存器 |
| 英文描述： | AHC/VHC/H/U/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14 |
| 封装： | GREEN, PLASTIC, MS-012AB, SOIC-14 |
| 文件页数： | 19/25页 |
| 文件大小： | 1052K |
| 代理商： | SN74AHC74DR |
SN54AHC74, SN74AHC74
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH CLEAR AND PRESET
SCLS255J DECEMBER 1995 REVISED JULY 2003
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC
0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (see Note 1)
0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, VO (see Note 1)
0.5 V to VCC + 0.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0)
20 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0 or VO > VCC)
±20 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, IO (VO = 0 to VCC)
±25 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through VCC or GND
±50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance,
θJA (see Note 2): D package
86
°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 2): DB package
96
°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 2): DGV package
127
°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 2): N package
80
°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 2): NS package
76
°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 2): PW package
113
°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(see Note 3): RGY package
47
°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg
65
°C to 150°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
3. The package thermal impedance is calculated in accordance with JESD 51-5.
recommended operating conditions (see Note 4)
SN54AHC74
SN74AHC74
UNIT
MIN
MAX
MIN
MAX
UNIT
VCC
Supply voltage
2
5.5
2
5.5
V
VCC = 2 V
1.5
VIH
High-level input voltage
VCC = 3 V
2.1
V
VIH
High level input voltage
VCC = 5.5 V
3.85
V
VCC = 2 V
0.5
VIL
Low-level input voltage
VCC = 3 V
0.9
V
VIL
Low level input voltage
VCC = 5.5 V
1.65
V
VI
Input voltage
0
5.5
0
5.5
V
VO
Output voltage
0
VCC
0
VCC
V
VCC = 2 V
50
mA
IOH
High-level output current
VCC = 3.3 V ± 0.3 V
4
mA
IOH
High level output current
VCC = 5 V ± 0.5 V
8
mA
VCC = 2 V
50
mA
IOL
Low-level output current
VCC = 3.3 V ± 0.3 V
4
mA
IOL
Low level output current
VCC = 5 V ± 0.5 V
8
mA
Δt/Δv
Input transition rise or fall rate
VCC = 3.3 V ± 0.3 V
100
ns/V
Δt/Δv
Input transition rise or fall rate
VCC = 5 V ± 0.5 V
20
ns/V
TA
Operating free-air temperature
55
125
40
85
°C
NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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