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| 型号： | SN74ALVC16409DGG |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 总线收发器 |
| 英文描述： | EXCHANGER, PDSO56 |
| 封装： | TSSOP-56 |
| 文件页数： | 1/9页 |
| 文件大小： | 158K |
| 代理商： | SN74ALVC16409DGG |
SN74ALVC16409
9BIT, 4PORT UNIVERSAL BUS EXCHANGER
WITH 3STATE OUTPUTS
SCAS259A NOVEMBER 1993 REVISED JULY 1995
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
D EPIC (Enhanced-Performance Implanted
CMOS) Submicron Process
D Member of the Texas Instruments
Widebus+
Family
D UBE (Universal Bus Exchanger) Allows
Synchronous Data Exchange
D Designed to Facilitate Incident-Wave
Switching for Line Impedances of 50
or Greater
D Typical VOLP (Output Ground Bounce)
< 0.8 V at VCC = 3.3 V, TA = 25°C
D Typical VOHV (Output VOH Undershoot)
> 2 V at VCC = 3.3 V, TA = 25°C
D ESD Protection Exceeds 2000 V Per
MIL-STD-883C, Method 3015; Exceeds
200 V Using Machine Model
(C = 200 pF, R = 0)
D Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
D Latch-Up Performance Exceeds 250 mA
Per JEDEC Standard JESD-17
D Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) and Thin Shrink
Small-Outline (DGG) Packages
description
The SN74ALVC16409 allows synchronous data
exchange between four different buses.
Data flow is controlled by the select (SEL0 SEL4) inputs. A data-flow state is stored on the rising edge of the
clock (CLK) input if the select-enable (SELEN) input is low. Once a data-flow state has been established, data
is stored in the flip-flop on the rising edge of CLK if SELEN is high.
The data-flow control logic is designed to allow glitch-free data transmission.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
The SN74ALVC16409 is available in TI’s shrink small-outline (DL) and thin shrink small-outline (DGG)
packages, which provide twice the I/O pin count and functionality of standard small-outline packages in the
same printed-circuit-board area.
The SN74ALVC16409 is characterized for operation from 40
°C to 85°C.
Copyright
1995, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus+, EPIC, and UBE are trademarks of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
DGG OR DL PACKAGE
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PRE
SEL0
1A1
GND
1A2
1A3
VCC
1A4
1A5
1A6
GND
1A7
1A8
1A9
2A1
2A2
2A3
GND
2A4
2A5
2A6
VCC
2A7
2A8
GND
2A9
SEL1
SEL2
CLK
SELEN
1B1
GND
1B2
1B3
VCC
1B4
1B5
1B6
GND
1B7
1B8
1B9
2B1
2B2
2B3
GND
2B4
2B5
2B6
VCC
2B7
2B8
GND
2B9
SEL4
SEL3
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| SN74ALVC16828DLR | ALVC/VCX/A SERIES, DUAL 10-BIT DRIVER, INVERTED OUTPUT, PDSO56 |
| SN74ALVC16841DGGR | ALVC/VCX/A SERIES, DUAL 10-BIT DRIVER, TRUE OUTPUT, PDSO56 |
| SN74ALVC16843DGGR | ALVC/VCX/A SERIES, DUAL 9-BIT DRIVER, TRUE OUTPUT, PDSO56 |
| SN74ALVC16843DGG | ALVC/VCX/A SERIES, DUAL 9-BIT DRIVER, TRUE OUTPUT, PDSO56 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| SN74ALVC16409DL | 制造商:Texas Instruments 功能描述: |
| SN74ALVC164245ADGGR | 制造商:Texas Instruments 功能描述: |
| SN74ALVC164245DGG | 制造商:Texas Instruments 功能描述:TISSN74ALVC164245DGG LEVEL SHIFTING TRAN |
| SN74ALVC164245DGGR | 功能描述:转换 - 电压电平 Tri-State 16-Bit RoHS:否 制造商:Micrel 类型:CML/LVDS/LVPECL to LVCMOS/LVTTL 传播延迟时间:1.9 ns 电源电流:14 mA 电源电压-最大:3.6 V 电源电压-最小:3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:MLF-8 |
| SN74ALVC164245DGGR | 制造商:Texas Instruments 功能描述:Transceiver Logic IC |
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