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参数资料
| 型号： | SN74ALVCH373DGVR |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 总线收发器 |
| 英文描述： | ALVC/VCX/A SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20 |
| 封装： | GREEN, PLASTIC, TVSOP-20 |
| 文件页数： | 1/17页 |
| 文件大小： | 546K |
| 代理商： | SN74ALVCH373DGVR |
www.ti.com
FEATURES
DGV, DW, OR PW PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE
1Q
1D
2D
2Q
3Q
3D
4D
4Q
GND
VCC
8Q
8D
7D
7Q
6Q
6D
5D
5Q
LE
DESCRIPTION/ORDERING INFORMATION
SN74ALVCH373
OCTAL TRANSPARENT D-TYPE LATCH
WITH 3-STATE OUTPUTS
SCES116H – JULY 1997 – REVISED OCTOBER 2004
Operates From 1.65 V to 3.6 V
Max tpd of 3.3 ns at 3.3 V
±24-mA Output Drive at 3.3 V
Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
This octal transparent D-type latch is designed for 1.65-V to 3.6-V VCC operation.
The SN74ALVCH373 is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers,
and working registers. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When
LE is taken low, the Q outputs are latched at the logic levels set up at the D inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or
low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the
bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines
without interface or pullup components.
OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors
with the bus-hold circuitry is not recommended.
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
Tube
SN74ALVCH373DW
SOIC - DW
ALVCH373
Tape and reel
SN74ALVCH373DWR
TSSOP - PW
Tape and reel
SN74ALVCH373PWR
VB373
-40
°C to 85°C
TVSOP - DGV
Tape and reel
SN74ALVCH373DGVR
VB373
VFBGA - GQN
SN74ALVCH373GQNR
Tape and reel
VB373
VFBGA - ZQN (Pb-free)
SN74ALVCH373ZQNR
(1)
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright 1997–2004, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
相关PDF资料 |
PDF描述 |
|---|---|
| SN74ALVCH374DBRG4 | ALVC/VCX/A SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20 |
| SN74ALVCH374DWR | ALVC/VCX/A SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20 |
| SN74ALVCH374N | ALVC/VCX/A SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDIP20 |
| SN74ALVCH374PWRG4 | ALVC/VCX/A SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20 |
| SN74ALVCH374DBRE4 | ALVC/VCX/A SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| SN74ALVCH373DW | 功能描述:闭锁 Octal w/Tri-St Out RoHS:否 制造商:Micrel 电路数量:1 逻辑类型:CMOS 逻辑系列:TTL 极性:Non-Inverting 输出线路数量:9 高电平输出电流: 低电平输出电流: 传播延迟时间: 电源电压-最大:12 V 电源电压-最小:5 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:SOIC-16 封装:Reel |
| SN74ALVCH373DWE4 | 功能描述:闭锁 Octal w/Tri-St Out RoHS:否 制造商:Micrel 电路数量:1 逻辑类型:CMOS 逻辑系列:TTL 极性:Non-Inverting 输出线路数量:9 高电平输出电流: 低电平输出电流: 传播延迟时间: 电源电压-最大:12 V 电源电压-最小:5 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:SOIC-16 封装:Reel |
| SN74ALVCH373DWG4 | 功能描述:闭锁 Octal TRANPNT DType Latch RoHS:否 制造商:Micrel 电路数量:1 逻辑类型:CMOS 逻辑系列:TTL 极性:Non-Inverting 输出线路数量:9 高电平输出电流: 低电平输出电流: 传播延迟时间: 电源电压-最大:12 V 电源电压-最小:5 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:SOIC-16 封装:Reel |
| SN74ALVCH373DWR | 功能描述:闭锁 Tri-St Octal D-Type RoHS:否 制造商:Micrel 电路数量:1 逻辑类型:CMOS 逻辑系列:TTL 极性:Non-Inverting 输出线路数量:9 高电平输出电流: 低电平输出电流: 传播延迟时间: 电源电压-最大:12 V 电源电压-最小:5 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:SOIC-16 封装:Reel |
| SN74ALVCH373DWRE4 | 功能描述:闭锁 Tri-St Octal D-Type RoHS:否 制造商:Micrel 电路数量:1 逻辑类型:CMOS 逻辑系列:TTL 极性:Non-Inverting 输出线路数量:9 高电平输出电流: 低电平输出电流: 传播延迟时间: 电源电压-最大:12 V 电源电压-最小:5 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:SOIC-16 封装:Reel |
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