参数资料
型号: SN74AS648DWG4
厂商: TEXAS INSTRUMENTS INC
元件分类: 总线收发器
英文描述: AS SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDSO24
封装: PLASTIC, SO-24
文件页数: 3/28页
文件大小: 658K
代理商: SN74AS648DWG4
SN54ALS646, SN54ALS648, SN54AS646
SN74ALS646A, SN74ALS648A, SN74AS646, SN74AS648
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SDAS039F – DECEMBER 1983 – REVISED JANUARY 1995
11
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
switching characteristics (see Figure 2)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
R1 = 500
,
R2 = 500
,
TA = MIN to MAX
UNIT
SN54ALS648
SN74ALS648A
MIN
MAX
MIN
MAX
fmax
35
40
MHz
tPLH
CLKBA or CLKAB
AorB
8
39
7
33
ns
tPHL
CLKBA or CLKAB
A or B
5
23
5
20
ns
tPLH
AorB
BorA
3
20
2
17
ns
tPHL
A or B
B or A
2
12
2
10
ns
tPLH
SBA or SAB
AorB
5
44
5
39
ns
tPHL
(stored data low)
A or B
4
26
4
22
ns
tPLH
SBA or SAB
AorB
6
30
6
25
ns
tPHL
(stored data high)
A or B
6
25
6
21
ns
tPZH
OE
AorB
4
25
2
22
ns
tPZL
OE
A or B
4
25
4
22
ns
tPHZ
OE
AorB
1
12
1
10
ns
tPLZ
OE
A or B
2
21
2
15
ns
tPZH
DIR
AorB
4
35
2
27
ns
tPZL
DIR
A or B
3
25
3
19
ns
tPHZ
DIR
AorB
1
17
1
14
ns
tPLZ
DIR
A or B
2
22
2
15
ns
For conditions shown MIN or MAX, use the appropriate value specified under recommended operating conditions.
These parameters are measured with the internal output state of the storage register opposite that of the bus input.
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