参数资料
型号: SN74AUP1G02YEPR
厂商: TEXAS INSTRUMENTS INC
元件分类: 门电路
英文描述: AUP/ULP/V SERIES, 2-INPUT NOR GATE, PBGA5
封装: DSBGA-5
文件页数: 1/13页
文件大小: 384K
代理商: SN74AUP1G02YEPR
SN74AUP1G02
LOW POWER SINGLE 2INPUT POSITIVENOR GATE
SCES568B JUNE 2004 REVISED JUNE 2005
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D Available in the Texas Instruments
NanoStar
and NanoFree Packages
D Low Static Power Consumption;
ICC = 0.9 A Max
D Low Dynamic Power Consumption;
Cpd = 4.3 pF Typ at 3.3 V
D Low Input Capacitance; Ci = 1.5 pF Typ
D Low Noise; Overshoot and Undershoot
<10% of VCC
D Ioff Supports Partial-Power-Down Mode
Operation
D Input Hysteresis Allows Slow Input
Transition and Better Switching Noise
Immunity at the Input
(Vhys = 250 mV Typ at 3.3 V)
D Wide Operating VCC Range of 0.8 V to 3.6 V
D Optimized for 3.3-V Operation
D 3.6-V I/O Tolerant to Support Mixed-Mode
Signal Operation
D tpd = 4.5 ns Max at 3.3 V
D Suitable for Point-to-Point Applications
D Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
D ESD Performance Tested Per JESD 22
2000-V Human-Body Model
(A114-B, Class II)
200-V Machine Model (A115-A)
1000-V Charged-Device Model (C101)
D ESD Protection Exceeds ±5000 V With
Human-Body Model
3
2
4
5
1
AVCC
Y
B
GND
DBV PACKAGE
(TOP VIEW)
YEP OR YZP PACKAGE
(BOTTOM VIEW)
DCK PACKAGE
(TOP VIEW)
3
2
4
5
1
AVCC
Y
B
GND
3
2
4
5
1
AVCC
Y
B
GND
A
GND
VCC
Y
B
DRL PACKAGE
(TOP VIEW)
See mechanical drawings for dimensions.
1
4
2
3
5
description /ordering information
The AUP family is TI’s premier solution to the industry’s low-power needs in battery-powered portable
applications. This family ensures a very low static and dynamic power consumption across the entire VCC range
of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity (see
Figures 1 and 2).
Figure 1. AUP The Lowest-Power Family
AUP
LVC
AUP
LVC
Static Power Consumption
(
A)
Dynamic Power Consumption
(pF)
Single, dual, and triple gates
3.3-V
Logic
3.3-V
Logic
0%
20%
40%
60%
80%
100%
0%
20%
40%
60%
80%
100%
0.5
0
0.5
1
1.5
2
2.5
3
3.5
05
10
15
20
25
30
35
40
45
Figure 2. Excellent Signal Integrity
Time ns
V
oltage
V
AUP1G08 data at CL = 15 pF
Output
Input
Switching Characteristics
at 25 MHz
Copyright
2005, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar and NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
相关PDF资料
PDF描述
SN74AUP1G04DCKTE4 AUP/ULP/V SERIES, 1-INPUT INVERT GATE, PDSO5
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SN74AUP1G06DRLR AUP/ULP/V SERIES, 1-INPUT INVERT GATE, PDSO5
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SN74AUP1G04DBVR 功能描述:变换器 LoPwr Sngl Invrtr Gt RoHS:否 制造商:NXP Semiconductors 电路数量:6 逻辑系列:74ABT 逻辑类型:BiCMOS 高电平输出电流:- 15 mA 低电平输出电流:20 mA 传播延迟时间:2.2 ns 电源电压-最大:5.5 V 电源电压-最小:4.5 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 工作温度范围: 封装 / 箱体:DIP-14 封装:Tube
SN74AUP1G04DBVRE4 功能描述:变换器 Lo PWR SNGL Invrtr Gate RoHS:否 制造商:NXP Semiconductors 电路数量:6 逻辑系列:74ABT 逻辑类型:BiCMOS 高电平输出电流:- 15 mA 低电平输出电流:20 mA 传播延迟时间:2.2 ns 电源电压-最大:5.5 V 电源电压-最小:4.5 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 工作温度范围: 封装 / 箱体:DIP-14 封装:Tube
SN74AUP1G04DBVRG4 功能描述:变换器 Lo PWR SNGL Invrtr Gate RoHS:否 制造商:NXP Semiconductors 电路数量:6 逻辑系列:74ABT 逻辑类型:BiCMOS 高电平输出电流:- 15 mA 低电平输出电流:20 mA 传播延迟时间:2.2 ns 电源电压-最大:5.5 V 电源电压-最小:4.5 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 工作温度范围: 封装 / 箱体:DIP-14 封装:Tube
SN74AUP1G04DBVT 功能描述:变换器 Lo PWR SNGL Invrtr Gate RoHS:否 制造商:NXP Semiconductors 电路数量:6 逻辑系列:74ABT 逻辑类型:BiCMOS 高电平输出电流:- 15 mA 低电平输出电流:20 mA 传播延迟时间:2.2 ns 电源电压-最大:5.5 V 电源电压-最小:4.5 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 工作温度范围: 封装 / 箱体:DIP-14 封装:Tube