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参数资料
| 型号： | SN74AUP1G14YZPR |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 门电路 |
| 英文描述： | AUP/ULP/V SERIES, 1-INPUT INVERT GATE, BGA5 |
| 封装： | LEAD FREE, DSBGA-5 |
| 文件页数： | 12/24页 |
| 文件大小： | 1077K |
| 代理商： | SN74AUP1G14YZPR |
AUP
LVC
AUP
LVC
Static-Power Consumption
(
A)
Dynamic-Power Consumption
(pF)
Single, dual, and triple gates
3.3-V
Logic
3.3-V
Logic
0%
20%
40%
60%
80%
100%
0%
20%
40%
60%
80%
100%
0.5
0
0.5
1
1.5
2
2.5
3
3.5
0
5
10
15
20
25
30
35
40
45
Time ns
V
oltage
V
AUP1G08 data at C
L = 15 pF
Output
Input
Switching Characteristics
at 25 MHz
A
Y
2
4
A
Y
1
3
SCES578I – JUNE 2003 – REVISED MAY 2010
www.ti.com
Figure 1. AUP – The Lowest-Power Family
Figure 2. Excellent Signal Integrity
NanoStar package technology is a major breakthrough in IC packaging concepts, using the die as the
package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION(1)
ORDERABLE PART
TOP-SIDE
TA
PACKAGE(2)
NUMBER
MARKING(3)
NanoStar – WCSP (DSBGA)
Reel of 3000
SN74AUP1G14YFPR
_ _ _ HF_
0.23-mm large bump – YFP
NanoStar – WCSP (DSBGA)
Reel of 3000
SN74AUP1G14YZPR
_ _ _ HF_
0.23-mm large bump – YZP (Pb-free)
QFN – DRY
Reel of 5000
SN74AUP1G14DRYR
HF
–40°C to 85°C
uQFN – DSF
Reel of 5000
SN74AUP1G14DSFR
HF
SOT (SOT-23) – DBV
Reel of 3000
SN74AUP1G14DBVR
H14_
SOT (SC-70) – DCK
Reel of 3000
SN74AUP1G14DCKR
HF_
SOT (SOT-553) – DRL
Reel of 4000
SN74AUP1G14DRLR
HF_
(1)
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2)
Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(3)
DBV/DCK/DRL: The actual top-side marking has one additional character that designates the wafer fab/assembly site.
YFP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the wafer fab/assembly site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, = Pb-free).
FUNCTION TABLE
INPUT
OUTPUT
A
Y
H
L
H
LOGIC DIAGRAM (POSITIVE LOGIC)
(DBV, DCK, DRL, DRT, DRY, and YZP PACKAGES)
LOGIC DIAGRAM (POSITIVE LOGIC)
(YFP PACKAGE)
2
Copyright 2003–2010, Texas Instruments Incorporated
Product Folder Link(s): SN74AUP1G14
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相关代理商/技术参数 |
参数描述 |
|---|---|
| SN74AUP1G17DBVR | 功能描述:缓冲器和线路驱动器 Lo Pwr Sngl Schmtt Trggr Invrtr RoHS:否 制造商:Micrel 输入线路数量:1 输出线路数量:2 极性:Non-Inverting 电源电压-最大:+/- 5.5 V 电源电压-最小:+/- 2.37 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:MSOP-8 封装:Reel |
| SN74AUP1G17DBVRE4 | 功能描述:缓冲器和线路驱动器 Lo PWR SNGL Schmitt Trgr Bufr RoHS:否 制造商:Micrel 输入线路数量:1 输出线路数量:2 极性:Non-Inverting 电源电压-最大:+/- 5.5 V 电源电压-最小:+/- 2.37 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:MSOP-8 封装:Reel |
| SN74AUP1G17DBVRG4 | 功能描述:缓冲器和线路驱动器 Lo PWR SNGL Schmitt Trgr Bufr RoHS:否 制造商:Micrel 输入线路数量:1 输出线路数量:2 极性:Non-Inverting 电源电压-最大:+/- 5.5 V 电源电压-最小:+/- 2.37 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:MSOP-8 封装:Reel |
| SN74AUP1G17DBVT | 功能描述:缓冲器和线路驱动器 Lo PWR SNGL Schmitt Trgr Bufr RoHS:否 制造商:Micrel 输入线路数量:1 输出线路数量:2 极性:Non-Inverting 电源电压-最大:+/- 5.5 V 电源电压-最小:+/- 2.37 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:MSOP-8 封装:Reel |
| SN74AUP1G17DBVTE4 | 功能描述:缓冲器和线路驱动器 Lo PWR SNGL Schmitt Trgr Bufr RoHS:否 制造商:Micrel 输入线路数量:1 输出线路数量:2 极性:Non-Inverting 电源电压-最大:+/- 5.5 V 电源电压-最小:+/- 2.37 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:MSOP-8 封装:Reel |
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