参数资料
型号: SN74CBT3244CPWR
厂商: Texas Instruments, Inc.
英文描述: B-BIT FET BUS SWITCH 5-V BUS SWITCH WITH 2-V UNDERSHOOT PROTECTION
中文描述: 乙位FET总线开关5 - V BUS开关与2第V冲保护
文件页数: 14/16页
文件大小: 423K
代理商: SN74CBT3244CPWR
SN74CBT3244C
8BIT FET BUS SWITCH
5V BUS SWITCH WITH 2V UNDERSHOOT PROTECTION
SCDS130A SEPTEMBER 2003 REVISED OCTOBER 2003
7
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
VOH
VOL
CL
(see Note A)
TEST CIRCUIT
S1
7 V
Open
GND
RL
tPLH
tPHL
Output
Waveform 1
S1 at 7 V
(see Note B)
Output
Waveform 2
S1 at Open
(see Note B)
tPZL
tPZH
tPLZ
tPHZ
3 V
0 V
VOH
VOL
0 V
VOL + V
VOH V
0 V
Output
Control
(VIN)
3 V
3.5 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES (tpd(s))
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
Output
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR
≤ 10 MHz, ZO = 50 , tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd(s). The tpd propagation delay is the calculated RC time constant of the typical ON-state
resistance of the switch and the specified load capacitance, when driven by an ideal voltage source (zero output impedance).
H. All parameters and waveforms are not applicable to all devices.
1.5 V
50
VG1
VCC
DUT
50
VIN
50
VG2
50
VI
TEST
RL
S1
V
CL
5 V
± 0.5 V
4 V
VCC
VI
tPHZ/tPZH
tPLZ/tPZL
tpd(s)
5 V
± 0.5 V
4 V
5 V
± 0.5 V
4 V
Open
7 V
Open
500
500
500
500
500
500
VCC or GND
GND
VCC
50 pF
0.3 V
Output
Control
(VIN)
Input Generator
VO
Figure 3. Test Circuit and Voltage Waveforms
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