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参数资料
| 型号： | SN74LS162AD |
| 厂商： | MOTOROLA INC |
| 元件分类： | 计数器 |
| 英文描述： | LS SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP DECADE COUNTER, PDSO16 |
| 封装： | SOIC-16 |
| 文件页数： | 5/6页 |
| 文件大小： | 79K |
| 代理商： | SN74LS162AD |
5-5
FAST AND LS TTL DATA
SN54/74LS160A
SN54/74LS161A
SN54/74LS162A
SN54/74LS163A
AC SETUP REQUIREMENTS (TA = 25°C)
Sb l
P
Limits
Ui
T
C
di i
Symbol
Parameter
Min
Typ
Max
Unit
Test Conditions
tWCP
Clock Pulse Width Low
25
ns
V5 0 V
tW
MR or SR Pulse Width
20
ns
V5 0 V
ts
Setup Time, other*
20
ns
V5 0 V
ts
Setup Time PE or SR
25
ns
VCC = 5.0 V
th
Hold Time, data
3
ns
th
Hold Time, other
0
ns
trec
Recovery Time MR to CP
15
ns
*CEP, CET or DATA
DEFINITION OF TERMS
SETUP TIME (ts) — is defined as the minimum time required
for the correct logic level to be present at the logic input prior to
the clock transition from LOW to HIGH in order to be recog-
nized and transferred to the outputs.
HOLD TIME (th) — is defined as the minimum time following
the clock transition from LOW to HIGH that the logic level must
be maintained at the input in order to ensure continued recog-
nition. A negative HOLD TIME indicates that the correct logic
level may be released prior to the clock transition from LOW to
HIGH and still be recognized.
RECOVERY TIME (trec) — is defined as the minimum time re-
quired between the end of the reset pulse and the clock transi-
tion from LOW to HIGH in order to recognize and transfer
HIGH Data to the Q outputs.
AC WAVEFORMS
Figure 1. Clock to Output Delays, Count
Frequency, and Clock Pulse Width
Figure 2. Master Reset to Output Delay, Master Reset
Pulse Width, and Master Reset Recovery Time
1.3 V
CP
Q
tW(H)
tW(L)
trec
tPHL
tPLH
OTHER CONDITIONS:
PE = MR (SR) = H
CEP = CET = H
OTHER CONDITIONS:
PE = L
P0 = P1 = P2 = P3 = H
tW
Q0 Q1 Q2 Q3
MR
CP
相关PDF资料 |
PDF描述 |
|---|---|
| SN74LS161ANS | LS SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, PDIP16 |
| SN74LS160AJS | LS SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP DECADE COUNTER, CDIP16 |
| SN74LS162ANS | LS SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP DECADE COUNTER, PDIP16 |
| SN74LS163AM | LS SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, PDSO16 |
| SN74LS163AD | LS SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, PDSO16 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| SN74LS162AN | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| SN74LS163AD | 功能描述:计数器 IC 4-Bit Synchronous Binary Counters RoHS:否 制造商:NXP Semiconductors 计数器类型:Binary Counters 逻辑系列:74LV 位数:10 计数法: 计数顺序: 工作电源电压:1 V to 5.5 V 工作温度范围:- 40 C to + 125 C 封装 / 箱体:SOT-109 封装:Reel |
| SN74LS163ADE4 | 功能描述:计数器 IC 4-Bit Synchronous Binary Counters RoHS:否 制造商:NXP Semiconductors 计数器类型:Binary Counters 逻辑系列:74LV 位数:10 计数法: 计数顺序: 工作电源电压:1 V to 5.5 V 工作温度范围:- 40 C to + 125 C 封装 / 箱体:SOT-109 封装:Reel |
| SN74LS163ADG4 | 功能描述:计数器 IC Sync 4B Binary Counters RoHS:否 制造商:NXP Semiconductors 计数器类型:Binary Counters 逻辑系列:74LV 位数:10 计数法: 计数顺序: 工作电源电压:1 V to 5.5 V 工作温度范围:- 40 C to + 125 C 封装 / 箱体:SOT-109 封装:Reel |
| SN74LS163ADR | 功能描述:计数器 IC 4-Bit Synchronous Binary Counters RoHS:否 制造商:NXP Semiconductors 计数器类型:Binary Counters 逻辑系列:74LV 位数:10 计数法: 计数顺序: 工作电源电压:1 V to 5.5 V 工作温度范围:- 40 C to + 125 C 封装 / 箱体:SOT-109 封装:Reel |
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