参数资料
型号: SN74LS74ADR2
厂商: ON SEMICONDUCTOR
元件分类: 锁存器
英文描述: LS SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
封装: PLASTIC, SOIC-14
文件页数: 1/7页
文件大小: 169K
代理商: SN74LS74ADR2
Semiconductor Components Industries, LLC, 2006
July, 2006 Rev. 8
1
Publication Order Number:
SN74LS74A/D
SN74LS74A
Dual DType Positive
EdgeTriggered FlipFlop
The SN74LS74A dual edge-triggered flip-flop utilizes Schottky
TTL circuitry to produce high speed D-type flip-flops. Each flip-flop
has individual clear and set inputs, and also complementary Q and Q
outputs.
Information at input D is transferred to the Q output on the
positive-going edge of the clock pulse. Clock triggering occurs at a
voltage level of the clock pulse and is not directly related to the
transition time of the positive-going pulse. When the clock input is at
either the HIGH or the LOW level, the D input signal has no effect.
MODE SELECT TRUTH TABLE
OPERATING MODE
INPUTS
OUTPUTS
SD
CD
D
Q
Set
Reset (Clear)
*Undetermined
Load “1” (Set)
Load “0” (Reset)
L
H
L
H
L
H
X
h
l
H
L
H
L
H
L
H
* Both outputs will be HIGH while both SD and CD are LOW, but the output
states are unpredictable if SD and CD go HIGH simultaneously. If the levels
at the set and clear are near VIL maximum then we cannot guarantee to meet
the minimum level for VOH.
H, h = HIGH Voltage Level
L, I = LOW Voltage Level
X = Don’t Care
l, h (q) = Lower case letters indicate the state of the referenced input
i, h (q) = (or output) one set-up time prior to the HIGH to LOW clock transition.
GUARANTEED OPERATING RANGES
Symbol
Parameter
Min
Typ
Max
Unit
VCC
Supply Voltage
4.75
5.0
5.25
V
TA
Operating Ambient
Temperature Range
0
25
70
°C
IOH
Output Current High
0.4
mA
IOL
Output Current Low
8.0
mA
LOW
POWER
SCHOTTKY
SOIC
D SUFFIX
CASE 751A
PLASTIC
N SUFFIX
CASE 646
14
1
14
1
SOEIAJ
M SUFFIX
CASE 965
14
1
Device
Package
Shipping
ORDERING INFORMATION
SN74LS74AN
14 Pin DIP
2000 Units/Box
SN74LS74AD
SOIC14
55 Units/Rail
SN74LS74ADR2
SOIC14
2500/Tape & Reel
SN74LS74AM
SOEIAJ14
See Note 1
SN74LS74AMEL
SOEIAJ14
1. For ordering information on the EIAJ version of
the SOIC package, please contact your local
ON Semiconductor representative.
See Note 1
http://onsemi.com
相关PDF资料
PDF描述
SN74LS74N LS SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, INVERTED OUTPUT, PDIP14
SN74LS75JDS LS SERIES, DUAL HIGH LEVEL TRIGGERED D LATCH, COMPLEMENTARY OUTPUT, CDIP16
SN74LS77JD LS SERIES, DUAL HIGH LEVEL TRIGGERED D LATCH, TRUE OUTPUT, CDIP14
SN74LS75JS LS SERIES, DUAL HIGH LEVEL TRIGGERED D LATCH, COMPLEMENTARY OUTPUT, CDIP16
SN74LS75NS LS SERIES, DUAL HIGH LEVEL TRIGGERED D LATCH, COMPLEMENTARY OUTPUT, PDIP16
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