参数资料
型号: SN74LV08AMPWREP
厂商: TEXAS INSTRUMENTS INC
元件分类: 门电路
英文描述: LV/LV-A/LVX/H SERIES, QUAD 2-INPUT AND GATE, PDSO14
封装: TSSOP-14
文件页数: 1/9页
文件大小: 247K
代理商: SN74LV08AMPWREP
www.ti.com
FEATURES
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1A
1B
1Y
2A
2B
2Y
GND
VCC
4B
4A
4Y
3B
3A
3Y
PW PACKAGE
(TOP VIEW)
DESCRIPTION/ORDERING INFORMATION
The SN74LV08A-EP performs the Boolean function Y = A S B or Y = A + B in positive logic.
QUADRUPLE 2-INPUT POSITIVE-AND GATE
SCLS481B – MAY 2003 – REVISED JANUARY 2006
Controlled Baseline
Latch-Up Performance Exceeds 250 mA Per
JESD 17
– One Assembly/Test Site, One Fabrication
Site
ESD Protection Exceeds JESD 22
Extended Temperature Performance of
– 2000-V Human-Body Model (A114-A)
–55
°C to 125°C
– 200-V Machine Model (A115-A)
Enhanced Diminishing Manufacturing
– 1000-V Charged-Device Model (C101)
Sources (DMS) Support
Enhanced Product-Change Notification
Qualification Pedigree (1)
Typical V
OLP (Output Ground Bounce)
<0.8 V at V
CC = 3.3 V, TA = 25°C
Typical V
OHV (Output VOH Undershoot)
>2.3 V at V
CC = 3.3 V, TA = 25°C
Supports Mixed-Mode Voltage Operation on
All Ports
I
off Supports Partial-Power-Down Mode
Operation
(1)
Component qualification in accordance with JEDEC and
industry standards to ensure reliable operation over an
extended temperature range. This includes, but is not limited
to, Highly Accelerated Stress Test (HAST) or biased 85/85,
temperature cycle, autoclave or unbiased HAST,
electromigration, bond intermetallic life, and mold compound
life. Such qualification testing should not be viewed as
justifying use of this component beyond specified
performance and environmental limits.
This quadruple 2-input positive-AND gate is designed for 2-V to 5.5-V VCC operation.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
–40
°C to 105°C
TSSOP – PW
Tape and reel
SN74LV08ATPWREP
LV08AEP
–55
°C to 125°C
TSSOP – PW
Tape and reel
SN74LV08AMPWREP
LV08AEP
(1)
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
FUNCTION TABLE
(EACH GATE)
INPUTS
OUTPUT
Y
A
B
H
L
X
L
X
L
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright 2003–2006, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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相关代理商/技术参数
参数描述
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