参数资料
型号: SN74LV244ADGVR
厂商: TEXAS INSTRUMENTS INC
元件分类: 总线收发器
英文描述: LV/LV-A/LVX/H SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, PDSO20
封装: GREEN, PLASTIC, TVSOP-20
文件页数: 12/22页
文件大小: 771K
代理商: SN74LV244ADGVR
SN54LV244A, SN74LV244A
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCLS383L SEPTEMBER 1997 REVISED AUGUST 2010
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
description/ordering information (continued)
The ’LV244A devices are designed specifically to improve both the performance and density of 3-state memory
address drivers, clock drivers, and bus-oriented receivers and transmitters.
These devices are organized as two 4-bit line drivers with separate output-enable (OE) inputs. When OE is low,
the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the
high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the
outputs, preventing damaging current backflow through the devices when they are powered down.
FUNCTION TABLE
(each buffer)
INPUTS
OUTPUT
OE
A
OUTPUT
Y
L
H
L
LL
H
X
Z
logic diagram (positive logic)
1
218
1Y1
1OE
1A1
416
1Y2
1A2
614
1Y3
1A3
812
1Y4
1A4
19
11
9
2Y1
2OE
2A1
13
7
2Y2
2A2
15
5
2Y3
2A3
17
3
2Y4
2A4
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