参数资料
型号: SN74LV374ARGYRG4
厂商: Texas Instruments, Inc.
英文描述: OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
中文描述: 八路边沿触发的D型倒装3触发器态输出
文件页数: 2/20页
文件大小: 842K
代理商: SN74LV374ARGYRG4
SCLS408H APRIL 1998 REVISED APRIL 2005
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description/ordering information (continued)
These devices feature 3-state outputs designed specifically for driving highly capacitive or relatively
low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional
bus drivers, and working registers.
On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D)
inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high
or low logic levels) or high-impedance state. In the high-impedance state, the outputs neither load nor drive the
bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines
without need for interface or pullup components.
OE does not affect internal operations of the latch. Old data can be retained or new data can be entered while
the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
These devices are fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the
outputs, preventing damaging current backflow through the devices when they are powered down.
terminal assignments
1
2
3
4
A
1Q
OE
VCC
1D
8Q
B
2D
7D
8D
C
3Q
2Q
6Q
7Q
D
4D
5D
3D
6D
E
GND
4Q
CLK
5Q
FUNCTION TABLE
(each flip-flop)
INPUTS
CLK
L
OUTPUT
Q
OE
D
L
H
H
L
L
L
L
X
Q0
Z
H
X
X
GQN PACKAGE
(TOP VIEW)
1
2
3
4
A
B
C
D
E
相关PDF资料
PDF描述
SN74LV393ADB DUAL 4-BIT BINARY COUNTERS
SN74LV4040ADB Bipolar Power DPAK PNP 6A 100V; Package: DPAK-3 (SINGLE GAUGE); No of Pins: 4; Container: Rail; Qty per Container: 75
SN54LV4040A Octal D-Type Flip-Flop; Package: TSSOP 20 LEAD; No of Pins: 20; Container: Tape and Reel; Qty per Container: 2500
SN54LV4040AFK Octal D-Type Flip-Flop; Package: SOIC-20 WB; No of Pins: 20; Container: Rail; Qty per Container: 38
SN54LV4040AJ Octal D-Type Flip-Flop; Package: SOIC-20 WB; No of Pins: 20; Container: Rail; Qty per Container: 38
相关代理商/技术参数
参数描述
SN74LV374ATDB 功能描述:触发器 Octal Edge-Trig D-Ty F-F W/3-State Otpt RoHS:否 制造商:Texas Instruments 电路数量:2 逻辑系列:SN74 逻辑类型:D-Type Flip-Flop 极性:Inverting, Non-Inverting 输入类型:CMOS 输出类型: 传播延迟时间:4.4 ns 高电平输出电流:- 16 mA 低电平输出电流:16 mA 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:X2SON-8 封装:Reel
SN74LV374ATDBG4 功能描述:触发器 Octal Edge Trigred DType FlipFlop RoHS:否 制造商:Texas Instruments 电路数量:2 逻辑系列:SN74 逻辑类型:D-Type Flip-Flop 极性:Inverting, Non-Inverting 输入类型:CMOS 输出类型: 传播延迟时间:4.4 ns 高电平输出电流:- 16 mA 低电平输出电流:16 mA 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:X2SON-8 封装:Reel
SN74LV374ATDBR 功能描述:触发器 Octal Edge-Trig D-Ty F-F W/3-State Otpt RoHS:否 制造商:Texas Instruments 电路数量:2 逻辑系列:SN74 逻辑类型:D-Type Flip-Flop 极性:Inverting, Non-Inverting 输入类型:CMOS 输出类型: 传播延迟时间:4.4 ns 高电平输出电流:- 16 mA 低电平输出电流:16 mA 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:X2SON-8 封装:Reel
SN74LV374ATDBRG4 功能描述:触发器 Octal Edge Trigred DType FlipFlop RoHS:否 制造商:Texas Instruments 电路数量:2 逻辑系列:SN74 逻辑类型:D-Type Flip-Flop 极性:Inverting, Non-Inverting 输入类型:CMOS 输出类型: 传播延迟时间:4.4 ns 高电平输出电流:- 16 mA 低电平输出电流:16 mA 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:X2SON-8 封装:Reel
SN74LV374ATDW 功能描述:触发器 Octal Edge-Trig D-Ty F-F W/3-State Otpt RoHS:否 制造商:Texas Instruments 电路数量:2 逻辑系列:SN74 逻辑类型:D-Type Flip-Flop 极性:Inverting, Non-Inverting 输入类型:CMOS 输出类型: 传播延迟时间:4.4 ns 高电平输出电流:- 16 mA 低电平输出电流:16 mA 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:X2SON-8 封装:Reel