参数资料
型号: SN74LV374ATPWTG4
厂商: TEXAS INSTRUMENTS INC
元件分类: 总线收发器
英文描述: LV/LV-A/LVX/H SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20
封装: GREEN, PLASTIC, TSSOP-20
文件页数: 1/20页
文件大小: 675K
代理商: SN74LV374ATPWTG4
DB, DW, NS, OR PW PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE
1Q
1D
2D
2Q
3Q
3D
4D
4Q
GND
VCC
8Q
8D
7D
7Q
6Q
6D
5D
5Q
CLK
RGY PACKAGE
(TOP VIEW)
1
20
10
11
2
3
4
5
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7
8
9
19
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17
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8Q
8D
7D
7Q
6Q
6D
5D
5Q
1Q
1D
2D
2Q
3Q
3D
4D
4Q
OE
CLK
V
GND
CC
www.ti.com
SCES632 – JUNE 2010
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
Check for Samples: SN74LV374AT
1
FEATURES
Inputs Are TTL-Voltage Compatible
Ioff Supports Partial-Power-Down Mode
Operation
4.5-V to 5.5-V VCC Operation
Latch-Up Performance Exceeds 250 mA Per
Typical tpd of 4.9 ns at 5 V
JESD 17
Typical VOLP (Output Ground Bounce) <0.8 V
ESD Protection Exceeds JESD 22
at VCC = 5 V, TA = 25°C
2000-V Human-Body Model (A114-A)
Typical VOHV (Output VOH Undershoot) >2.3 V
200-V Machine Model (A115-A)
at VCC = 5 V, TA = 25°C
1000-V Charged-Device Model (C101)
Support Mixed-Mode Voltage Operation on All
Ports
DESCRIPTION
The SN74LV374AT is an octal edge-triggered D-type flip-flop. This device features 3-state outputs designed
specifically for driving highly capacitive or relatively low-impedance loads. The device is particularly suitable for
implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D)
inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or
low logic levels) or high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus
lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines
without need for interface or pullup components.
OE does not affect internal operations of the latch. Old data can be retained or new data can be entered while
the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright 2010, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
相关PDF资料
PDF描述
SN74LV374DBLE LV/LV-A/LVX/H SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20
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相关代理商/技术参数
参数描述
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SN74LV374ATRGYRG4 功能描述:触发器 Octal Edge-Trig D-Ty F-F W/3-State Otpt RoHS:否 制造商:Texas Instruments 电路数量:2 逻辑系列:SN74 逻辑类型:D-Type Flip-Flop 极性:Inverting, Non-Inverting 输入类型:CMOS 输出类型: 传播延迟时间:4.4 ns 高电平输出电流:- 16 mA 低电平输出电流:16 mA 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:X2SON-8 封装:Reel
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SN74LV374DW 制造商:Rochester Electronics LLC 功能描述:- Bulk
SN74LV393AD 功能描述:计数器 IC Dual 4-Bit Binary Counters RoHS:否 制造商:NXP Semiconductors 计数器类型:Binary Counters 逻辑系列:74LV 位数:10 计数法: 计数顺序: 工作电源电压:1 V to 5.5 V 工作温度范围:- 40 C to + 125 C 封装 / 箱体:SOT-109 封装:Reel