参数资料
型号: SN74LVC00AMPWREP
厂商: TEXAS INSTRUMENTS INC
元件分类: 门电路
英文描述: LVC/LCX/Z SERIES, QUAD 2-INPUT NAND GATE, PDSO14
封装: GREEN, PLASTIC, TSSOP-14
文件页数: 5/12页
文件大小: 383K
代理商: SN74LVC00AMPWREP
www.ti.com
A
B
Y
Absolute Maximum Ratings
(1)
Recommended Operating Conditions
(1)
QUADRUPLE 2-INPUT POSITIVE-NAND GATE
SCAS729B – NOVEMBER 2003 – REVISED MARCH 2007
LOGIC DIAGRAM, EACH GATE (POSITIVE LOGIC)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
VCC
Supply voltage range
–0.5
6.5
V
VI
Input voltage range(2)
–0.5
6.5
V
VO
Output voltage range(2)(3)
–0.5
VCC + 0.5
V
IIK
Input clamp current
VI < 0 V
–50
mA
IOK
Output clamp current
VO < 0 V
–50
mA
IO
Continuous output current
±50
mA
Continuous current through VCC or GND
±100
mA
D package
86
θ
JA
Package thermal impedance (4)
°C/W
PW package
113
Tstg
Storage temperature range
–65
150
°C
(1)
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
(3)
The value of VCC is provided in the recommended operating conditions table.
(4)
The package thermal impedance is calculated in accordance with JESD 51-7.
MIN
MAX
UNIT
Operating
2
3.6
VCC
Supply voltage
V
Data retention only
1.5
VIH
High-level input voltage
VCC = 2.7 V to 3.6 V
2
V
VIL
Low-level input voltage
VCC = 2.7 V to 3.6 V
0.8
V
VI
Input voltage
0
5.5
V
VO
Output voltage
0
VCC
V
VCC = 2.7 V
–12
IOH
High-level output current
mA
VCC = 3 V
–24
VCC = 2.7 V
12
IOL
Low-level output current
mA
VCC = 3 V
24
M suffix
–55
125
TA
Operating free-air temperature
°C
Q suffix
–40
125
(1)
All unused inputs of the device must be held at VCC or GND to ensure proper device operation. See the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
2
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