参数资料
型号: SN74LVC3G04DCTR
厂商: Texas Instruments
文件页数: 9/16页
文件大小: 0K
描述: IC TRIPLE INVERTER GATE SM8
标准包装: 1
系列: 74LVC
逻辑类型: 逆变器,缓冲器
电路数: 3
输入数: 1
电源电压: 1.65 V ~ 5.5 V
电流 - 静态(最大值): 10µA
输出电流高,低: 32mA,32mA
逻辑电平 - 低: 0.7 V ~ 0.8 V
逻辑电平 - 高: 1.7 V ~ 2 V
额定电压和最大 CL 时的最大传播延迟: 3.2ns @ 5V,50pF
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
供应商设备封装: SM8
封装/外壳: 7-LSSOP(0.11"?,2.80mm 宽)
包装: 标准包装
产品目录页面: 989 (CN2011-ZH PDF)
其它名称: 296-13278-6
1A
1Y
1
7
2A
2Y
3
5
3A
3Y
6
2
SCES363L – AUGUST 2001 – REVISED NOVEMBER 2013
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Function Table
(Each Inverter)
INPUT
OUTPUT
A
Y
H
L
H
Logic Diagram (Positive Logic)
Absolute Maximum Ratings
(1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
VCC
Supply voltage range
–0.5
6.5
V
VI
Input voltage range(2)
–0.5
6.5
V
VO
Voltage range applied to any output when the output is in the high-impedance or power-off state(2)
–0.5
6.5
V
VO
Voltage range applied to any output when the output is in the high or low state(2)(3)
–0.5
VCC + 0.5
V
IIK
Input clamp current
VI < 0
–50
mA
IOK
Output clamp current
VO < 0
–50
mA
IO
Continuous output current
±50
mA
Continuous current through VCC or GND
±100
mA
DCT package
220
θJA
Package thermal impedance(4)
DCU package
227
°C/W
YZP package
102
Tstg
Storage temperature range
–65
150
°C
(1)
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3)
The value of VCC is provided in the recommended operating conditions table.
(4)
The package thermal impedance is calculated in accordance with JESD 51-7.
2
Copyright 2001–2013, Texas Instruments Incorporated
Product Folder Links: SN74LVC3G04
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