参数资料
型号: SN74LVCH16241ADGGR
厂商: TEXAS INSTRUMENTS INC
元件分类: 总线收发器
英文描述: LVC/LCX/Z SERIES, QUAD 4-BIT DRIVER, TRUE OUTPUT, PDSO48
封装: PLASTIC, TSSOP-48
文件页数: 1/9页
文件大小: 536K
代理商: SN74LVCH16241ADGGR
SN74LVCH16241A
16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCAS348E – MARCH 1994 – REVISED JUNE 1998
4–13
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D Member of the Texas Instruments
Widebus
Family
D EPIC (Enhanced-Performance Implanted
CMOS) Submicron Process
D Typical VOLP (Output Ground Bounce)
< 0.8 V at VCC = 3.3 V, TA = 25°C
D Typical VOHV (Output VOH Undershoot)
> 2 V at VCC = 3.3 V, TA = 25°C
D Power Off Disables Outputs, Permitting
Live Insertion
D Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
D Supports Mixed-Mode Signal Operation on
All Ports (5-V Input/Output Voltage With
3.3-V VCC)
D Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) and Thin Shrink
Small-Outline (DGG) Packages
description
This 16-bit buffer/driver is designed for 1.65-V to
3.6-V VCC operation.
The SN74LVCH16241A is designed specifically
to improve both the performance and density of
3-state memory address drivers, clock drivers,
and bus-oriented receivers and transmitters.
This device can be used as four 4-bit buffers, two
8-bit buffers, or one 16-bit buffer, and provides
true outputs and complementary output-enable
(OE and OE) inputs.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. OE
should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the
current-sourcing capability of the driver.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators
in a mixed 3.3-V/5-V system environment.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
The SN74LVCH16241A is characterized for operation from –40
°C to 85°C.
PRODUCT
PREVIEW
Copyright
1998, Texas Instruments Incorporated
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
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1OE
1Y1
1Y2
GND
1Y3
1Y4
VCC
2Y1
2Y2
GND
2Y3
2Y4
3Y1
3Y2
GND
3Y3
3Y4
VCC
4Y1
4Y2
GND
4Y3
4Y4
4OE
2OE
1A1
1A2
GND
1A3
1A4
VCC
2A1
2A2
GND
2A3
2A4
3A1
3A2
GND
3A3
3A4
VCC
4A1
4A2
GND
4A3
4A4
3OE
DGG OR DL PACKAGE
(TOP VIEW)
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