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参数资料
| 型号： | SN74LVCH16374AZRDR |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 总线收发器 |
| 英文描述： | LVC/LCX/Z SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, PBGA54 |
| 封装： | LEAD FREE, FBGA-54 |
| 文件页数： | 11/15页 |
| 文件大小： | 455K |
| 代理商： | SN74LVCH16374AZRDR |
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Electrical Characteristics
Timing Requirements
SN74LVCH16374A
16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP
WITH 3-STATE OUTPUTS
SCAS757A – DECEMBER 2003 – REVISED OCTOBER 2005
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP(1)
MAX
UNIT
IOH = –100 A
1.65 V to 3.6 V
VCC – 0.2
IOH = –4 mA
1.65 V
1.2
IOH = –8 mA
2.3 V
1.7
VOH
V
2.7 V
2.2
IOH = –12 mA
3 V
2.4
IOH = –24 mA
3 V
2.2
IOL = 100 A
1.65 V to 3.6 V
0.2
IOL = 4 mA
1.65 V
0.45
VOL
IOL = 8 mA
2.3 V
0.7
V
IOL = 12 mA
2.7 V
0.4
IOL = 24 mA
3 V
0.55
II
VI = 0 to 5.5 V
3.6 V
±5
A
VI = 0.58 V
(2)
1.65 V
VI = 1.07 V
(2)
VI = 0.7 V
45
2.3 V
II(hold)
VI = 1.7 V
–45
A
VI = 0.8 V
75
3 V
VI = 2 V
–75
VI = 0 to 3.6 V(3)
3.6 V
±500
Ioff
VI or VO = 5.5 V
0
±10
A
IOZ
VO = 0 to 5.5 V
3.6 V
±10
A
VI = VCC or GND
20
ICC
IO = 0
3.6 V
A
3.6 V
≤ V
I ≤ 5.5 V
(4)
20
I
CC
One input at VCC – 0.6 V,
Other inputs at VCC or GND
2.7 V to 3.6 V
500
A
Ci
VI = VCC or GND
3.3 V
5
pF
Co
VO = VCC or GND
3.3 V
6.5
pF
(1)
All typical values are at VCC = 3.3 V, TA = 25°C.
(2)
This information was not available at the time of publication.
(3)
This is the bus-hold maximum dynamic current required to switch the input from one state to another.
(4)
This applies in the disabled state only.
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1)
VCC = 1.8 V
VCC = 2.5 V
VCC = 3.3 V
VCC = 2.7 V
± 0.15 V
± 0.2 V
± 0.3 V
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
fclock
Clock frequency
(1)
150
MHz
tw
Pulse duration, CLK high or low
(1)
3.3
ns
tsu
Setup time, data before CLK
↑
(1)
1.9
ns
th
Hold time, data after CLK
↑
(1)
1.1
ns
(1)
This information was not available at the time of publication.
5
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