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| 型号： | SN74LVTH125PWLE |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 总线收发器 |
| 英文描述： | LVT SERIES, QUAD 1-BIT DRIVER, TRUE OUTPUT, PDSO14 |
| 封装： | PLASTIC, TSSOP-14 |
| 文件页数： | 8/9页 |
| 文件大小： | 175K |
| 代理商： | SN74LVTH125PWLE |
PRODUCT FOLDER | PRODUCT INFO: FEATURES | DESCRIPTION | DATASHEETS | PRICING/AVAILABILITY | SAMPLES |
PRODUCT SUPPORT: TRAINING
SN74LVTH125, 3.3-V ABT Quadruple Bus Buffers With 3-State Outputs
DEVICE STATUS: ACTIVE
PARAMETER NAME SN74LVTH125
Voltage Nodes (V) 3.3, 2.7
Vcc range (V)
2.7 to 3.6
Input Level
TTL
Output Level
CMOS
Output Drive (mA) -32/+64
No. of Gates
4
FEATURES
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State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low Static-Power Dissipation
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Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC)
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Support Unregulated Battery Operation Down to 2.7 V
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Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C
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Ioff and Power-Up 3-State Support Hot Insertion
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Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
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Latch-Up Performance Exceeds 500 mA Per JESD 17
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ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R
= 0)
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Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), Thin Very Small-Outline (DGV), and
Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK), and Ceramic (J) DIPs
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DESCRIPTION
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These bus buffers are designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL
interface to a 5-V system environment.
The 'LVTH125 devices feature independent line drivers with 3-state outputs. Each output is in the high-impedance state
when the associated output-enable (OE\) input is high.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
When VCC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down. However, to
ensure the high-impedance state above 1.5 V, OE\ should be tied to VCC through a pullup resistor; the minimum value of the
resistor is determined by the current-sinking capability of the driver.
These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the
outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state
circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.
The SN54LVTH125 is characterized for operation over the full military temperature range of -55°C to 125°C. The
SN74LVTH125 is characterized for operation from -40°C to 85°C.
TECHNICAL DOCUMENTS
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DATASHEET
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Product Folder:SN74LVTH125, 3.3-V ABT Quadruple Bus Buffers With 3-State Outputs
file:////roarer/root/export/projects/bitting2/imaging/BITTING/mail_pdf/2000/sn74lvth125.html (1 of 2) [9/6/2001 11:54:29 AM]
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| SN74LVTH125PWR | 功能描述:缓冲器和线路驱动器 Tri-State ABT Quad RoHS:否 制造商:Micrel 输入线路数量:1 输出线路数量:2 极性:Non-Inverting 电源电压-最大:+/- 5.5 V 电源电压-最小:+/- 2.37 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:MSOP-8 封装:Reel |
| SN74LVTH125PWRE4 | 功能描述:缓冲器和线路驱动器 3.3V ABT Quad Bus Buff W/3-St Otpt RoHS:否 制造商:Micrel 输入线路数量:1 输出线路数量:2 极性:Non-Inverting 电源电压-最大:+/- 5.5 V 电源电压-最小:+/- 2.37 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:MSOP-8 封装:Reel |
| SN74LVTH125PWRG4 | 功能描述:缓冲器和线路驱动器 3.3V ABT Quad Bus Buff W/3-St Otpt RoHS:否 制造商:Micrel 输入线路数量:1 输出线路数量:2 极性:Non-Inverting 电源电压-最大:+/- 5.5 V 电源电压-最小:+/- 2.37 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:MSOP-8 封装:Reel |
| SN74LVTH125RGYR | 功能描述:缓冲器和线路驱动器 Tri-State ABT Quad RoHS:否 制造商:Micrel 输入线路数量:1 输出线路数量:2 极性:Non-Inverting 电源电压-最大:+/- 5.5 V 电源电压-最小:+/- 2.37 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:MSOP-8 封装:Reel |
| SN74LVTH125RGYRG4 | 功能描述:缓冲器和线路驱动器 16-Bit FET Bus Switch RoHS:否 制造商:Micrel 输入线路数量:1 输出线路数量:2 极性:Non-Inverting 电源电压-最大:+/- 5.5 V 电源电压-最小:+/- 2.37 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:MSOP-8 封装:Reel |
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