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参数资料
| 型号： | SN74LVTH16500DLR |
| 厂商： | Texas Instruments, Inc. |
| 英文描述： | 3.3-V ABT 18-BIT UNIVERSAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS |
| 中文描述： | 的3.3V ABT生根粉18位通用总线收发3态输出 |
| 文件页数： | 2/16页 |
| 文件大小： | 393K |
| 代理商： | SN74LVTH16500DLR |
SCBS701F JULY 1997 REVISED SEPTEMBER 2003
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description/ordering information (continued)
Data flow in each direction is controlled by output-enable (OEAB and OEBA), latch-enable (LEAB and LEBA),
and clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the devices operate in the transparent mode when
LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at a high or low logic level. If LEAB is
low, the A data is stored in the latch/flip-flop on the high-to-low transition of CLKAB. OEAB is active high. When
OEAB is high, the B-port outputs are active. When OEAB is low, the B-port outputs are in the high-impedance
state.
Data flow for B to A is similar to that of A to B, but uses OEBA, LEBA, and CLKBA. The output enables are
complementary (OEAB is active high and OEBA is active low).
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors
with the bus-hold circuitry is not recommended.
When V
CC
is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.5 V, OE should be tied to V
CC
through a pullup resistor
and OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by
the current-sinking/current-sourcing capability of the driver.
These devices are fully specified for hot-insertion applications using I
off
and power-up 3-state. The I
off
circuitry
disables the outputs, preventing damaging current backflow through the devices when they are powered down.
The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
terminal assignments
1
2
3
4
5
6
A
A1
LEAB
OEAB
GND
CLKAB
B1
B
A3
A2
GND
GND
B2
B3
C
A5
A4
VCC
GND
VCC
GND
B4
B5
D
E
F
A7
A6
B6
B7
A9
A8
B8
B9
A10
A11
B11
B10
G
A12
A13
GND
GND
B13
B12
H
A14
A15
VCC
GND
VCC
GND
B15
B14
J
A16
A17
B17
B16
K
A18
OEBA
LEBA
GND
CLKBA
B18
GQL OR ZQL PACKAGE
(TOP VIEW)
J
H
G
F
E
D
C
B
A
2
1
3
4
6
5
K
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相关代理商/技术参数 |
参数描述 |
|---|---|
| SN74LVTH16500GQLR | 功能描述:通用总线函数 Tri-State ABT 18-Bit RoHS:否 制造商:Texas Instruments 逻辑类型:CMOS 逻辑系列:74VMEH 电路数量:1 开启电阻（最大值）: 传播延迟时间:10.1 ns 电源电压-最大:3.45 V 电源电压-最小:3.15 V 最大工作温度:+ 85 C 最小工作温度:0 C 封装 / 箱体:TSSOP-48 封装:Reel |
| SN74LVTH16500ZQLR | 功能描述:总线收发器 Device w/Octal Buffers RoHS:否 制造商:Fairchild Semiconductor 逻辑类型:CMOS 逻辑系列:74VCX 每芯片的通道数量:16 输入电平:CMOS 输出电平:CMOS 输出类型:3-State 高电平输出电流:- 24 mA 低电平输出电流:24 mA 传播延迟时间:6.2 ns 电源电压-最大:2.7 V, 3.6 V 电源电压-最小:1.65 V, 2.3 V 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-48 封装:Reel |
| SN74LVTH16501DGGR | 功能描述:通用总线函数 Tri-State ABT 18-Bit RoHS:否 制造商:Texas Instruments 逻辑类型:CMOS 逻辑系列:74VMEH 电路数量:1 开启电阻（最大值）: 传播延迟时间:10.1 ns 电源电压-最大:3.45 V 电源电压-最小:3.15 V 最大工作温度:+ 85 C 最小工作温度:0 C 封装 / 箱体:TSSOP-48 封装:Reel |
| SN74LVTH16501DL | 功能描述:通用总线函数 Tri-State ABT 18-Bit RoHS:否 制造商:Texas Instruments 逻辑类型:CMOS 逻辑系列:74VMEH 电路数量:1 开启电阻（最大值）: 传播延迟时间:10.1 ns 电源电压-最大:3.45 V 电源电压-最小:3.15 V 最大工作温度:+ 85 C 最小工作温度:0 C 封装 / 箱体:TSSOP-48 封装:Reel |
| SN74LVTH16501DLG4 | 功能描述:通用总线函数 Device w/Octal Inverting Buffers RoHS:否 制造商:Texas Instruments 逻辑类型:CMOS 逻辑系列:74VMEH 电路数量:1 开启电阻（最大值）: 传播延迟时间:10.1 ns 电源电压-最大:3.45 V 电源电压-最小:3.15 V 最大工作温度:+ 85 C 最小工作温度:0 C 封装 / 箱体:TSSOP-48 封装:Reel |
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