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参数资料
| 型号： | SN74LVTH245ADWE4 |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 总线收发器 |
| 英文描述： | LVT SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO20 |
| 封装： | GREEN, PLASTIC, MS-013, SOIC-20 |
| 文件页数： | 12/24页 |
| 文件大小： | 1025K |
| 代理商： | SN74LVTH245ADWE4 |
SN54LVTH245A, SN74LVTH245A
3.3-V ABT OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS130T MAY 1992 REVISED SEPTEMBER 2003
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description/ordering information (continued)
These devices are designed for asynchronous communication between data buses. They transmit data from
the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR)
input. The output-enable (OE) input can be used to disable the devices so the buses are effectively isolated.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup
or pulldown resistors with the bus-hold circuitry is not recommended.
These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry
disables the outputs, preventing damaging current backflow through the devices when they are powered down.
The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
terminal assignments
1234
A
A1
DIR
VCC
OE
B
A3
B2
A2
B1
C
A5
A4
B4
B3
D
A7
B6
A6
B5
E
GND
A8
B8
B7
FUNCTION TABLE
INPUTS
OPERATION
OE
DIR
OPERATION
L
B data to A bus
L
H
A data to B bus
H
X
Isolation
logic diagram (positive logic)
DIR
OE
A1
B1
To Seven Other Channels
1
2
19
18
Pin numbers shown are for the DB, DW, FK, J, NS, PW, RGY, and W packages.
SN74LVTH245A . . . GQN OR ZQN PACKAGE
(TOP VIEW)
1
234
A
B
C
D
E
相关PDF资料 |
PDF描述 |
|---|---|
| SN74LVTH245ANSRE4 | LVT SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO20 |
| SN74LVTH2952NSRE4 | LVT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24 |
| SN74LVTH2952DWRG4 | LVT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24 |
| SN74LVTH2952NSR | LVT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24 |
| SN74LVTH2952DBLE | LVT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| SN74LVTH245ADWG4 | 功能描述:总线收发器 3.3-V ABT Octal Bus Trncvr W/3-St Otpt RoHS:否 制造商:Fairchild Semiconductor 逻辑类型:CMOS 逻辑系列:74VCX 每芯片的通道数量:16 输入电平:CMOS 输出电平:CMOS 输出类型:3-State 高电平输出电流:- 24 mA 低电平输出电流:24 mA 传播延迟时间:6.2 ns 电源电压-最大:2.7 V, 3.6 V 电源电压-最小:1.65 V, 2.3 V 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-48 封装:Reel |
| SN74LVTH245ADWR | 功能描述:总线收发器 Tri-St ABT Octal Bus RoHS:否 制造商:Fairchild Semiconductor 逻辑类型:CMOS 逻辑系列:74VCX 每芯片的通道数量:16 输入电平:CMOS 输出电平:CMOS 输出类型:3-State 高电平输出电流:- 24 mA 低电平输出电流:24 mA 传播延迟时间:6.2 ns 电源电压-最大:2.7 V, 3.6 V 电源电压-最小:1.65 V, 2.3 V 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-48 封装:Reel |
| SN74LVTH245ADWRE4 | 功能描述:总线收发器 4-Bit Dual-Supply Bus Xcvr RoHS:否 制造商:Fairchild Semiconductor 逻辑类型:CMOS 逻辑系列:74VCX 每芯片的通道数量:16 输入电平:CMOS 输出电平:CMOS 输出类型:3-State 高电平输出电流:- 24 mA 低电平输出电流:24 mA 传播延迟时间:6.2 ns 电源电压-最大:2.7 V, 3.6 V 电源电压-最小:1.65 V, 2.3 V 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-48 封装:Reel |
| SN74LVTH245ADWRG4 | 功能描述:总线收发器 4-Bit Dual-Supply Bus Xcvr RoHS:否 制造商:Fairchild Semiconductor 逻辑类型:CMOS 逻辑系列:74VCX 每芯片的通道数量:16 输入电平:CMOS 输出电平:CMOS 输出类型:3-State 高电平输出电流:- 24 mA 低电平输出电流:24 mA 传播延迟时间:6.2 ns 电源电压-最大:2.7 V, 3.6 V 电源电压-最小:1.65 V, 2.3 V 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-48 封装:Reel |
| SN74LVTH245AGQNR | 功能描述:总线收发器 Tri-St ABT Octal Bus RoHS:否 制造商:Fairchild Semiconductor 逻辑类型:CMOS 逻辑系列:74VCX 每芯片的通道数量:16 输入电平:CMOS 输出电平:CMOS 输出类型:3-State 高电平输出电流:- 24 mA 低电平输出电流:24 mA 传播延迟时间:6.2 ns 电源电压-最大:2.7 V, 3.6 V 电源电压-最小:1.65 V, 2.3 V 最大工作温度:+ 85 C 封装 / 箱体:TSSOP-48 封装:Reel |
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