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| 型号： | SN74LVTH573ZQNR |
| 厂商： | Texas Instruments, Inc. |
| 英文描述： | 3.3V ABT OCTAL TRANSPARENT D TYPE LATCHES WITH 3 STATE OUTPUTS |
| 中文描述： | 3.3生根粉八路透明D型锁存器带三态输出 |
| 文件页数： | 6/7页 |
| 文件大小： | 94K |
| 代理商： | SN74LVTH573ZQNR |
SN54LVTH573, SN74LVTH573
3.3-V ABT OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCBS687E – MAY 1997 – REVISED APRIL 1999
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
1.5 V
th
tsu
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT
S1
6 V
Open
GND
500
500
Data Input
Timing Input
1.5 V
2.7 V
0 V
1.5 V
1.5 V
2.7 V
0 V
2.7 V
0 V
1.5 V
tw
Input
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
PULSE DURATION
tPLH
tPHL
tPHL
tPLH
VOH
VOH
VOL
VOL
1.5 V
1.5 V
2.7 V
0 V
1.5 V
1.5 V
Input
1.5 V
Output
Control
Output
Waveform 1
S1 at 6 V
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
VOL
VOH
tPZL
tPZH
tPLZ
tPHZ
1.5 V
1.5 V
3 V
0 V
1.5 V
VOL + 0.3 V
1.5 V
VOH – 0.3 V
≈
0 V
2.7 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
Output
Output
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
6 V
GND
TEST
S1
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR
≤
10 MHz, ZO = 50
, tr
≤
2.5 ns, tf
≤
2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
1.5 V
Figure 1. Load Circuit and Voltage Waveforms
相关PDF资料 |
PDF描述 |
|---|---|
| SN54LVTH574FK | Shift Register 3-State; Package: PDIP-16; No of Pins: 16; Qty per Container: 500 |
| SN54LVTH574J | Dual D-Type Flip-Flop with Set and Reset; Package: SOIC 14 LEAD; No of Pins: 14; Container: Rail; Qty per Container: 55 |
| SN54LVTH574W | Dual D-Type Flip-Flop with Set and Reset; Package: SOIC 14 LEAD; No of Pins: 14; Container: Rail; Qty per Container: 55 |
| SN54LVTT240 | 3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS |
| SN54LVTT240FK | 3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS |
相关代理商/技术参数 |
参数描述 |
|---|---|
| SN74LVTH574DB | 功能描述:触发器 3.3V ABT Octal Edge Trgerd DTyp FlipFlop RoHS:否 制造商:Texas Instruments 电路数量:2 逻辑系列:SN74 逻辑类型:D-Type Flip-Flop 极性:Inverting, Non-Inverting 输入类型:CMOS 输出类型: 传播延迟时间:4.4 ns 高电平输出电流:- 16 mA 低电平输出电流:16 mA 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:X2SON-8 封装:Reel |
| SN74LVTH574DBE4 | 功能描述:触发器 3.3V ABT Octal Edge Trgerd DTyp FlipFlop RoHS:否 制造商:Texas Instruments 电路数量:2 逻辑系列:SN74 逻辑类型:D-Type Flip-Flop 极性:Inverting, Non-Inverting 输入类型:CMOS 输出类型: 传播延迟时间:4.4 ns 高电平输出电流:- 16 mA 低电平输出电流:16 mA 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:X2SON-8 封装:Reel |
| SN74LVTH574DBG4 | 功能描述:触发器 3.3V ABT Octal Edge Trgerd DTyp FlipFlop RoHS:否 制造商:Texas Instruments 电路数量:2 逻辑系列:SN74 逻辑类型:D-Type Flip-Flop 极性:Inverting, Non-Inverting 输入类型:CMOS 输出类型: 传播延迟时间:4.4 ns 高电平输出电流:- 16 mA 低电平输出电流:16 mA 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:X2SON-8 封装:Reel |
| SN74LVTH574DBR | 功能描述:触发器 Tri-State ABT Octal RoHS:否 制造商:Texas Instruments 电路数量:2 逻辑系列:SN74 逻辑类型:D-Type Flip-Flop 极性:Inverting, Non-Inverting 输入类型:CMOS 输出类型: 传播延迟时间:4.4 ns 高电平输出电流:- 16 mA 低电平输出电流:16 mA 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:X2SON-8 封装:Reel |
| SN74LVTH574DBRE4 | 功能描述:触发器 ABT Octal Edge-Trig D-Type F-F RoHS:否 制造商:Texas Instruments 电路数量:2 逻辑系列:SN74 逻辑类型:D-Type Flip-Flop 极性:Inverting, Non-Inverting 输入类型:CMOS 输出类型: 传播延迟时间:4.4 ns 高电平输出电流:- 16 mA 低电平输出电流:16 mA 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:X2SON-8 封装:Reel |
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