- 您现在的位置：买卖IC网 > PDF目录374875 > SN8P1602BS (SONIX Technology Co., Ltd.) 8-Bit Micro-Controller PDF资料下载
参数资料
| 型号： | SN8P1602BS |
| 厂商： | SONIX Technology Co., Ltd. |
| 英文描述： | 8-Bit Micro-Controller |
| 中文描述： | 8位微控制器 |
| 文件页数： | 51/94页 |
| 文件大小： | 540K |
| 代理商： | SN8P1602BS |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页当前第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页
SN8P1600
8
8
8
TIMERS
WATCHDOG TIMER (WDT)
8-bit micro-controller
SONiX TECHNOLOGY CO., LTD
Page 51
Revision 1.94
The watchdog timer (WDT) is a binary up counter designed for monitoring program execution. If the program goes into
the unknown status by noise interference, WDT overflow signal raises and resets MCU. The instruction that clear the
watchdog timer (“B0BSET FWDRST“) should be executed within a certain period. If an instruction that clears the
watchdog timer is not executed within the period and the watchdog timer overflows, reset signal is generated and
system is restarted. The watchdog timer rate has two rates for high/low speed mode. WDT rate selection is handled by
oscillator code option. The watchdog timer disables at power down mode.
0CAH
Bit 7
Bit 6
Bit 5
Bit 4
OSCM
0
WDRST
0
0
Read/Write
-
R/W
-
-
After reset
-
0
-
-
WDRST: Watchdog timer reset bit. 0 = Non reset, 1 = clear the watchdog timer counter.
Note: The bit 0, 4, 5, 7 must be “0”, or the system will be error.
Watchdog timer overflow table.
Bit 3
CPUM0
R/W
0
Bit 2
CLKMD
R/W
0
Bit 1
STPHX
R/W
0
Bit 0
0
-
-
Code option of High_Clk
Watchdog timer overflow time
1 / ( fcpu
÷
2
14
÷
16 ) = 293 ms, Fosc=3.58MHz
1 / ( fcpu
÷
2
8
÷
16 ) = 500 ms, Fosc=32768Hz
4M_X’tal / 12M_X’tal / RC
32K_X’tal
Note: The watchdog timer can be enabled or disabled by the code option.
Example: An operation of watchdog timer is as following. To clear the watchdog timer counter in the top
of the main routine of the program.
Main:
B0BSET
FWDRST
; Clear the watchdog timer counter.
.
.
CALL
SUB1
CALL
SUB2
.
.
.
.
.
.
JMP
MAIN
相关PDF资料 |
PDF描述 |
|---|---|
| SN8P1602BX | 8-Bit Micro-Controller |
| SN8P1602K | 8-Bit Micro-Controller |
| SN8P1602P | 8-Bit Micro-Controller |
| SN8P1602Q | 8-Bit Micro-Controller |
| SN8P1602S | 8-Bit Micro-Controller |
相关代理商/技术参数 |
参数描述 |
|---|---|
| SN8P1602BV12 | 制造商:SONIX 制造商全称:SONIX 功能描述:8-Bit Micro-Controller |
| SN8P1602BX | 制造商:SONIX 制造商全称:SONIX 功能描述:8-Bit Micro-Controller |
| SN8P1602K | 制造商:SONIX 制造商全称:SONIX 功能描述:8-Bit Micro-Controller |
| SN8P1602P | 制造商:SONIX 制造商全称:SONIX 功能描述:8-Bit Micro-Controller |
| SN8P1602Q | 制造商:SONIX 制造商全称:SONIX 功能描述:8-Bit Micro-Controller |
发布紧急采购，3分钟左右您将得到回复。