SN8P1600
5
5
5
SYSTEM REGISTER
OVERVIEW
8-bit micro-controller
SONiX TECHNOLOGY CO., LTD
Page 36
Revision 1.94
The RAM area located in 80H~FFH bank 0 is system register area. The main purpose of system registers is to control
peripheral hardware of the chip. Using system registers can control I/O ports, timers and counters by programming.
The memory map provides an easy and quick reference source for writing application program. These system registers
accessing is controlled by the selected memory bank (RBANK = 0) or the bank 0 read/write instruction (B0MOV,
B0BSET, B0BCLR…).
SYSTEM REGISTER ARRANGEMENT (BANK 0)
BYTES of SYSTEM REGISTER
SN8P1602/1603
0
1
2
3
4
5
6
7
8
-
-
R
Z
Y
-
PFLAG
-
9
-
-
-
-
-
-
-
-
A
-
-
-
-
-
-
-
-
B
-
-
-
-
-
-
-
-
C
P1W
P1M
P2M
-
-
-
-
-
D
P0
P1
P2
-
-
-
-
-
E
-
-
-
-
-
-
-
@YZ
F
-
-
-
-
-
-
-
-
SN8P1604
0
1
2
3
4
5
6
7
8
-
-
R
Z
Y
-
PFLAG
-
9
-
-
-
-
-
-
-
-
A
-
-
-
-
-
-
-
-
B
-
-
-
-
-
-
-
-
C
P1W
P1M
P2M
-
-
P5M
-
-
D
P0
P1
P2
-
-
P5
-
-
E
-
-
-
-
-
-
-
@YZ
F
-
-
-
-
-
-
-
-
Description
PFLAG = ROM page and special flag register.
P1W = Port 1 Wakeup register.
PnM = Port n input/output mode register.
INTRQ = Interrupt request register.
OSCM = Oscillator mode register.
TCnM = Timer n mode register.
STKP = Stack pointer buffer.
@YZ = RAM YZ indirect addressing index pointer.
Note:
a). All register names had been declared in SN8ASM assembler.
b). 1-bit register name had been declared in SN8ASM assembler with “F” prefix code.
c). When using instruction to check empty location, logic “H” will be returned.
d). “b0bset”, “b0bclr”, ”bset”, ”bclr” instructions only support “R/W” registers.
8
-
-
-
-
9
-
-
-
-
A
-
-
-
-
B
-
-
-
-
-
C
-
-
-
-
-
-
-
D
-
-
-
-
-
-
-
E
-
-
-
-
PCL
-
-
F
-
-
-
-
INTRQ
-
-
STK3L
INTEN
-
-
STK3H STK2L STK2H STK1L STK1H STK0L
OSCM
TC0M
-
PCH
STKP
-
STK0H
TC0C
-
8
-
-
-
-
9
-
-
-
-
A
-
-
-
-
B
-
-
-
-
-
-
-
C
-
-
-
-
-
D
-
-
-
-
-
E
-
-
-
-
PCL
TC1R
-
F
-
-
-
-
INTRQ
-
-
STK3L
INTEN
-
-
STK3H STK2L STK2H STK1L STK1H STK0L
OSCM
-
-
PCH
STKP
-
STK0H
TC1M
-
TC1C
-
R = Working register and ROM look-up data buffer.
Y, Z = Working, @YZ and ROM addressing register.
Pn = Port n data buffer.
INTEN = Interrupt enable register.
PCH, PCL = Program counter.
TCnC = Timer n counting register.
TC1R= TC1 8-bit reload register.
STK0~STK3 = Stack 0 ~ stack 3 buffer.