参数资料
型号: SNJ54AHC126W
厂商: TEXAS INSTRUMENTS INC
元件分类: 总线收发器
英文描述: AHC/VHC/H/U/V SERIES, QUAD 1-BIT DRIVER, TRUE OUTPUT, CDFP14
封装: CERAMIC, DFP-14
文件页数: 1/22页
文件大小: 839K
代理商: SNJ54AHC126W
SN54AHC126, SN74AHC126
QUADRUPLE BUS BUFFER GATES
WITH 3-STATE OUTPUTS
SCLS257L – DECEMBER 1995 – REVISED JULY 2003
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D Operating Range 2-V to 5.5-V VCC
D Latch-Up Performance Exceeds 250 mA Per
JESD 17
description/ordering information
The ’AHC126 devices are quadruple bus buffer
gates featuring independent line drivers with
3-state outputs. Each output is disabled when the
associated output-enable (OE) input is low. When
OE is high, the respective gate passes the data
from the A input to its Y output.
To ensure the high-impedance state during power
up or power down, OE should be tied to GND
through a pulldown resistor; the minimum value of
the resistor is determined by the current-sourcing
capability of the driver.
ORDERING INFORMATION
TA
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP – N
Tube
SN74AHC126N
SOIC – D
Tube
SN74AHC126D
AHC126
SOIC – D
Tape and reel
SN74AHC126DR
AHC126
–40
°Cto85°C
SOP – NS
Tape and reel
SN74AHC126NSR
AHC126
–40
°C to 85°C
SSOP – DB
Tape and reel
SN74AHC126DBR
HA126
TSSOP
PW
Tube
SN74AHC126PW
HA126
TSSOP – PW
Tape and reel
SN74AHC126PWR
HA126
TVSOP – DGV
Tape and reel
SN74AHC126DGVR
HA126
CDIP – J
Tube
SNJ54AHC126J
–55
°C to 125°C
CFP – W
Tube
SNJ54AHC126W
LCCC – FK
Tube
SNJ54AHC126FK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Copyright
2003, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SN54AHC126 ...J OR W PACKAGE
SN74AHC126 . . . D, DB, DGV, N, NS, OR PW PACKAGE
(TOP VIEW)
SN54AHC126 . . . FK PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1OE
1A
1Y
2OE
2A
2Y
GND
VCC
4OE
4A
4Y
3OE
3A
3Y
32
1 20 19
910 11 12 13
4
5
6
7
8
18
17
16
15
14
4A
NC
4Y
NC
3OE
1Y
NC
2OE
NC
2A
1A
1OE
NC
3Y
3A
V
4OE
2Y
GND
NC
CC
NC – No internal connection
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
相关PDF资料
PDF描述
SN74AHC126DG4 AHC/VHC/H/U/V SERIES, QUAD 1-BIT DRIVER, TRUE OUTPUT, PDSO14
SN74AHC132NSRE4 AHC/VHC/H/U/V SERIES, QUAD 2-INPUT NAND GATE, PDSO14
SN74AHC132N AHC/VHC/H/U/V SERIES, QUAD 2-INPUT NAND GATE, PDIP14
SN74AHC132NE4 AHC/VHC/H/U/V SERIES, QUAD 2-INPUT NAND GATE, PDIP14
SN74AHC138NSRE4 AHC/VHC/H/U/V SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, PDSO16
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