参数资料
型号: SNJ54ALS1005J
厂商: TEXAS INSTRUMENTS INC
元件分类: 门电路
英文描述: ALS SERIES, HEX 1-INPUT INVERT GATE, CDIP14
封装: 0.300 INCH, CERAMIC, DIP-14
文件页数: 1/13页
文件大小: 567K
代理商: SNJ54ALS1005J
SN54ALS1005, SN74ALS1005
HEX INVERTING BUFFERS
WITH OPENCOLLECTOR OUTPUTS
SDAS240A APRIL 1982 REVISED JANUARY 1995
Copyright
1995, Texas Instruments Incorporated
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
Buffer Versions of ′ALS05A
Package Options Include Plastic
Small-Outline (D) Packages, Ceramic Chip
Carriers (FK), and Standard Plastic (N) and
Ceramic (J) 300-mil DIPs
description
These devices contain six independent inverting
buffers. They perform the Boolean function Y = A.
The
open-collector
outputs
require
pullup
resistors to perform correctly. These outputs can
be connected to other open-collector outputs to
implement active-low wired-OR or active-high
wired-AND functions. Open-collector devices are
often used to generate higher VOH levels.
The SN54ALS1005 is characterized for operation
over the full military temperature range of 55
°C
to 125
°C. The SN74ALS1005 is characterized for
operation from 0
°C to 70°C.
FUNCTION TABLE
(each inverter)
INPUT
A
OUTPUT
Y
H
L
H
logic symbol
logic diagram (positive logic)
1
1A
1Y
2
3
2A
2Y
4
5
3A
3Y
6
9
4A
4Y
8
11
5A
5Y
10
13
6A
6Y
12
6A
6Y
5A
5Y
4A
4Y
3A
3Y
2A
2Y
1Y
1A
1
3
5
9
11
13
2
4
6
8
10
12
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.
SN54ALS1005 ...J PACKAGE
SN74ALS1005 ...D OR N PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1A
1Y
2A
2Y
3A
3Y
GND
VCC
6A
6Y
5A
5Y
4A
4Y
SN54ALS1005 . . . FK PACKAGE
(TOP VIEW)
3
2
1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
6Y
NC
5A
NC
5Y
2A
NC
2Y
NC
3A
1Y
1A
NC
4Y
4A
V
6A
3Y
NC
CC
NC No internal connection
GND
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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