参数资料
型号: SNJ54GTL16923HVR
厂商: TEXAS INSTRUMENTS INC
元件分类: 总线收发器
英文描述: GTL/TVC SERIES, DUAL 9-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, CQFP68
封装: CERAMIC, QFP-68
文件页数: 2/9页
文件大小: 165K
代理商: SNJ54GTL16923HVR
SN54GTL16923, SN74GTL16923
18-BIT LVTTL-TO-GTL/GTL+ BUS TRANSCEIVERS
SCBS674D – AUGUST 1996 – REVISED JULY 1997
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description
These 18-bit registered bus transceivers contain two sets of D-type flip-flops for temporary storage of data
flowing in either direction.
The B port operates at GTL (VTT = 1.2 V and VREF = 0.8 V) and GTL+ (VTT = 1.5 V and VREF = 1 V) levels, while
the A port and control pins are compatible with LVTTL and 5-V TTL logic levels. VREF is the reference input
voltage for the B port.
Data flow in each direction is controlled by the output-enable (OEAB and OEBA) and the clock (CLKAB and
CLKBA) inputs. The clock-enable (CEAB and CEBA) inputs are used to enable or disable the clock for all 18
bits at a time. However, OEAB and OEBA are designed to control each 9-bit transceiver independently, which
makes the device more versatile.
For A-to-B data flow, the device operates on the low-to-high transition of CLKAB if CEAB is low. When OEAB
is low, the outputs are active. When OEAB is high, the outputs are in the high-impedance state. Data flow for
B to A is similar to that of A to B but uses OEBA, CLKBA, and CEBA.
Active bus-hold circuitry is provided to hold unused or floating TTL inputs at a valid logic state.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices in a mixed
3.3-V/5-V system environment.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN54GTL16923 is characterized for operation over the full military temperature range of –55
°C to 125°C.
The SN74GTL16923 is characterized for operation from –40
°C to 85°C.
FUNCTION TABLE
INPUTS
OUTPUT
MODE
CEAB
OEAB
CLKAB
A
B
MODE
X
H
X
Z
H
L
X
B0
Latched storage of A data
X
L
H or L
X
B0
Latched storage of A data
L
L
Clocked storage of A data
L
H
Clocked storage of A data
A-to-B data flow is shown: B-to-A data flow is similar but uses OEBA, CLKBA,
and CEBA.
Output level before the indicated steady-state input conditions were established
相关PDF资料
PDF描述
SNJ54H183W-00 TTL/H/L SERIES, 1-BIT ADDER/SUBTRACTOR, CDFP14
SN54H183J-00 TTL/H/L SERIES, 1-BIT ADDER/SUBTRACTOR, CDIP14
SN54H183W-00 TTL/H/L SERIES, 1-BIT ADDER/SUBTRACTOR, CDFP14
SN74LS183N-10 LS SERIES, 1-BIT ADDER/SUBTRACTOR, PDIP14
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