参数资料
型号: SNJ54LV08FK
厂商: TEXAS INSTRUMENTS INC
元件分类: 门电路
英文描述: LV/LV-A/LVX/H SERIES, QUAD 2-INPUT AND GATE, CQCC20
封装: CERAMIC, LCC-20
文件页数: 1/6页
文件大小: 110K
代理商: SNJ54LV08FK
SN54LV08A, SN74LV08A
QUADRUPLE 2-INPUT POSITIVE-AND GATES
SCLS387F – SEPTEMBER 1997 – REVISED AUGUST 2002
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D 2-V to 5.5-V VCC Operation
D Max tpd of 7 V at 5 V
D Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C
D Typical VOHV (Output VOH Undershoot)
>2.3 V at VCC = 3.3 V, TA = 25°C
D Support Mixed-Mode Voltage Operation on
All Ports
D Ioff Supports Partial-Power-Down Mode
Operation
D Latch-Up Performance Exceeds 250 mA Per
JESD 17
D ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1A
1B
1Y
2A
2B
2Y
GND
VCC
4B
4A
4Y
3B
3A
3Y
SN54LV08A ...J OR W PACKAGE
SN74LV08A . . . D, DB, DGV, NS,
OR PW PACKAGE
(TOP VIEW)
32 1 20 19
910 11 1213
4
5
6
7
8
18
17
16
15
14
4A
NC
4Y
NC
3B
1Y
NC
2A
NC
2B
1B
1A
NC
3Y
3A
V
4B
2Y
GND
NC
SN54LV08A . . . FK PACKAGE
(TOP VIEW)
CC
NC – No internal connection
SN74LV08A . . . RGY PACKAGE
(TOP VIEW)
114
78
2
3
4
5
6
13
12
11
10
9
4B
4A
4Y
3B
3A
1B
1Y
2A
2B
2Y
1A
3Y
V
GND
CC
GND
description/ordering information
These quadruple 2-input positive-AND gates are designed for 2-V to 5.5-V VCC operation.
The ’LV08A devices perform the Boolean function Y
+ A BorY + A ) B in positive logic.
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the
outputs, preventing damaging current backflow through the devices when they are powered down.
ORDERING INFORMATION
TA
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
QFN – RGY
Tape and reel
SN74LV08ARGYR
LV08A
SOIC
D
Tube
SN74LV08AD
LV08A
SOIC – D
Tape and reel
SN74LV08ADR
LV08A
–40
°C to 85°C
SOP – NS
Tape and reel
SN74LV08ANSR
74LV08A
SSOP – DB
Tape and reel
SN74LV08ADBR
LV08A
TSSOP – PW
Tape and reel
SN74LV08APWR
LV08A
TVSOP – DGV
Tape and reel
SN74LV08ADGVR
LV08A
CDIP – J
Tube
SNJ54LV08AJ
–55
°C to 125°C
CFP – W
Tube
SNJ54LV08AW
LCCC – FK
Tube
SNJ54LV08AFK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
Copyright
2002, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
相关PDF资料
PDF描述
SNJ54LV08W LV/LV-A/LVX/H SERIES, QUAD 2-INPUT AND GATE, CDFP14
SNJ54LV138W LV/LV-A/LVX/H SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, CDFP16
SNJ54LV138J LV/LV-A/LVX/H SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, CDIP16
SN54LV138J LV/LV-A/LVX/H SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, CDIP16
SNJ54LV14FK LV/LV-A/LVX/H SERIES, HEX 1-INPUT INVERT GATE, CQCC20
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