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参数资料
| 型号： | SNJ54LV11AW |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 门电路 |
| 英文描述： | LV/LV-A/LVX/H SERIES, TRIPLE 3-INPUT AND GATE, CDFP14 |
| 封装： | CERAMIC, DFP-14 |
| 文件页数： | 1/17页 |
| 文件大小： | 580K |
| 代理商： | SNJ54LV11AW |
SN54LV11A, SN74LV11A
TRIPLE 3INPUT POSITIVEAND GATES
SCES345D DECEMBER 2000 REVISED APRIL 2005
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D 2-V to 5.5-V VCC Operation
D Max tpd of 7 ns at 5 V
D Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C
D Typical VOHV (Output VOH Undershoot)
>2.3 V at VCC = 3.3 V, TA = 25°C
D Support Mixed-Mode Voltage Operation on
All Ports
D Ioff Supports Partial-Power-Down Mode
Operation
D Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
D ESD Protection Exceeds JESD 22
2000-V Human-Body Model (A114-A)
200-V Machine Model (A115-A)
1000-V Charged-Device Model (C101)
description/ordering information
These triple 3-input positive-AND gates are
designed for 2-V to 5.5-V VCC operation.
The ’LV11A devices perform the Boolean function
Y
+ A B CorY + A ) B ) C in positive
logic.
These
devices
are
fully
specified
for
partial-power-down applications using Ioff. The Ioff
circuitry
disables
the
outputs,
preventing
damaging current backflow through the devices
when they are powered down.
ORDERING INFORMATION
TA
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
SOIC D
Tube of 50
SN74LV11AD
LV11A
SOIC D
Reel of 2500
SN74LV11ADR
LV11A
SOP NS
Reel of 2000
SN74LV11ANSR
74LV11A
40
°C to 85°C
SSOP DB
Reel of 2000
SN74LV11ADBR
LV11A
40
°C to 85°C
Tube of 90
SN74LV11APW
TSSOP PW
Reel of 2000
SN74LV11APWR
LV11A
TSSOP PW
Reel of 250
SN74LV11APWT
LV11A
TVSOP DGV
Reel of 2000
SN74LV11ADGVR
LV11A
CDIP J
Tube of 25
SNJ54LV11AJ
55
°C to 125°C
CFP W
Tube of 150
SNJ54LV11AW
55 C to 125 C
LCCC FK
Tube of 55
SNJ54LV11AFK
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Copyright
2005, Texas Instruments Incorporated
SN54LV11A ...FK PACKAGE
(TOP VIEW)
SN54LV11A ...J OR W PACKAGE
SN74LV11A ... D, DB, DGV, NS, OR PW PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1A
1B
2A
2B
2C
2Y
GND
VCC
1C
1Y
3C
3B
3A
3Y
32 1 20 19
910 11 12 13
4
5
6
7
8
18
17
16
15
14
1Y
NC
3C
NC
3B
2A
NC
2B
NC
2C
1B
1A
NC
3Y
3A
V
1C
2Y
GND
NC
CC
NC No internal connection
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
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相关代理商/技术参数 |
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|---|---|
| SNJ54LVC00AFK | 制造商:Texas Instruments 功能描述: 制造商:Texas Instruments 功能描述:QUADRUPLE 2-INPUT POSITIVE-NAND GATE |
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| SNJ54LVC00AW | 制造商:Texas Instruments 功能描述: |
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