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参数资料
| 型号： | SNJ54LV165AFK |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 计数移位寄存器 |
| 英文描述： | LV/LV-A/LVX/H SERIES, 8-BIT RIGHT PARALLEL IN SERIAL OUT SHIFT REGISTER, COMPLEMENTARY OUTPUT, CQCC20 |
| 封装： | CERAMIC, LCC-20 |
| 文件页数： | 3/32页 |
| 文件大小： | 821K |
| 代理商： | SNJ54LV165AFK |
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SN54LV165A, SN74LV165A
PARALLEL-LOAD 8-BIT SHIFT REGISTERS
SCLS402M APRIL 1998 REVISED DECEMBER 2010
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
timing requirements over recommended operating free-air temperature range, VCC = 2.5 V ± 0.2 V
(unless otherwise noted) (see Figure 1)
TA = 25°C
SN54LV165A
SN74LV165A
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
UNIT
t
Pulse duration
CLK high or low
8.5
9
ns
tw
Pulse duration
SH/LD low
11
13
ns
SH/LD high before CLK↑
7
8.5
t
Setup time
SER before CLK↑
8.5
9.5
ns
tsu
Setup time
CLK INH before CLK↑
7
ns
Data before SH/LD↑
11.5
12
SER data after CLK↑
1
0
th
Hold time
Parallel data after SH/LD↑
0
0.5
ns
h
SH/LD high after CLK↑
0
timing requirements over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V
(unless otherwise noted) (see Figure 1)
TA = 25°C
SN54LV165A
SN74LV165A
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
UNIT
t
Pulse duration
CLK high or low
6
7
ns
tw
Pulse duration
SH/LD low
7.5
9
ns
SH/LD high before CLK↑
5
6
t
Setup time
SER before CLK↑
5
6
ns
tsu
Setup time
CLK INH before CLK↑
5
ns
Data before SH/LD↑
7.5
8.5
SER data after CLK↑
0
th
Hold time
Parallel data after SH/LD↑
0.5
ns
h
SH/LD high after CLK↑
0
timing requirements over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V
(unless otherwise noted) (see Figure 1)
TA = 25°C
SN54LV165A
SN74LV165A
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
UNIT
t
Pulse duration
CLK high or low
4
ns
tw
Pulse duration
SH/LD low
5
6
ns
SH/LD high before CLK↑
4
t
Setup time
SER before CLK↑
4
ns
tsu
Setup time
CLK INH before CLK↑
3.5
ns
Data before SH/LD↑
5
SER data after CLK↑
0.5
th
Hold time
Parallel data after SH/LD↑
1
ns
h
SH/LD high after CLK↑
0.5
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