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参数资料
| 型号： | SNJ54LVTH373FK |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 总线收发器 |
| 英文描述： | LVT SERIES, 8-BIT DRIVER, TRUE OUTPUT, CQCC20 |
| 封装： | CERAMIC, LCC-20 |
| 文件页数： | 12/19页 |
| 文件大小： | 689K |
| 代理商： | SNJ54LVTH373FK |
SN54LVTH373, SN74LVTH373
3.3V ABT OCTAL TRANSPARENT DTYPE LATCHES
WITH 3STATE OUTPUTS
SCBS689H MAY 1997 REVISED OCTOBER 2003
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description/ordering information (continued)
OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
When VCC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors
with the bus-hold circuitry is not recommended.
These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry
disables the outputs, preventing damaging current backflow through the devices when they are powered down.
The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
FUNCTION TABLE
(each latch)
INPUTS
OUTPUT
OE
LE
D
OUTPUT
Q
L
H
L
HL
L
LX
Q0
H
X
Z
logic diagram (positive logic)
OE
To Seven Other Channels
1
11
3
2
LE
1D
C1
1D
1Q
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| SNJ54LVTH373J | LVT SERIES, 8-BIT DRIVER, TRUE OUTPUT, CDIP20 |
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