参数资料
型号: SP207ECT-L
厂商: Exar Corporation
文件页数: 16/19页
文件大小: 0K
描述: IC TXRX RS232 ESD LP 24SOIC
标准包装: 31
类型: 收发器
驱动器/接收器数: 5/3
规程: RS232
电源电压: 4.5 V ~ 5.5 V
安装类型: 表面贴装
封装/外壳: 24-SOIC(0.295",7.50mm 宽)
供应商设备封装: 24-SOIC W
包装: 管件
Exar Corporation 48720 Kato Road, Fremont CA, 94538 50-668-707 www.exar.com
SP207E_0_052
6
Receiver input thresholds are between .2
to .7 volts typical. This allows the receiver
todetectstandardTTLorCMOSlogic-level
signals as well as RS-232 signals. If a re-
ceiver input is left unconnected or un-driven,
a5kpulldownresistortogroundwillcommit
the receiver to a logic- output state.
Highly Efficient Charge–Pump
The onboard dual-output charge pump is
usedtogeneratepositiveandnegativesignal
voltagesfortheRS-232drivers. Thisenables
fullycompliantRS-232andV.28signalsfrom
a single power supply device.
The charge pumps use four external capaci-
tors to hold and transfer electrical charge.
The
Exar design uses a unique approach
comparedtoolder,less–efficientdesigns.
The pumps use a four–phase voltage shift-
ing technique to attain symmetrical V+ and
V- power supplies. An intelligent control
oscillator regulates the operation of the
chargepumptomaintainthepropervoltages
atmaximumefficiency.
Phase 1
V
SS charge store and double — The positive
terminalsofcapacitorsC
and C2 are charged
from V
CC with their negative terminals initially
connected to ground. C
l+ is then connected
to ground and the stored charge from C
– is
superimposed onto C
2
–. Since C
2+ is still
connectedtoV
CC the voltage potential across
capacitor C
2 is now 2 x VCC.
VCC = +5V
–5V
+5V
VSS Storage Capacitor
VDD Storage Capacitor
C1
C2
C3
C4
+
Phase 2
— V
SS transfer and invert — Phase two con-
nects the negative terminal of C
2 to the VSS
storage capacitor and the positive terminal
of C
2 to ground. This transfers the doubled
andinverted(V-)voltageontoC
3. Meanwhile,
capacitor C
charged from VCC to prepare it
for its next phase.
Phase 3
V
DD charge store and double —Phase three
isidenticaltothefirstphase.Thepositive
terminalsofcapacitorsC
and C2 are charged
from V
CC with their negative terminals initially
connected to ground. C
l+ is then connected
to ground and the stored charge from C
– is
superimposed onto C
2–. Since C2+ is still
connectedtoV
CC the voltage potential across
capacitor C
2 is now 2 x VCC.
Phase 4
V
DD transfer — The fourth phase connects
the negative terminal of C
2 to ground and
the positive terminal of C
2 to the VDD stor-
age capacitor. This transfers the doubled
(V+)voltageontoC
4. Meanwhile, capacitor
C
is charged from VCC to prepare it for its
next phase.
Figure . Charge Pump — Phase
VCC = +5V
VSS Storage Capacitor
VDD Storage Capacitor
C1
C2
C3
C4
+
-7V
Figure 2. Charge Pump — Phase 2
VCC = +5V
–5V
+5V
VSS Storage Capacitor
VDD Storage Capacitor
C1
C2
C3
C4
+
Figure 3. Charge Pump — Phase 3
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