参数资料
| 型号： | SP320ACM-L |
| 厂商： | Exar Corporation |
| 文件页数： | 8/12页 |
| 文件大小： | 0K |
| 描述： | IC TXRX RS232 V.35 80LQFP |
| 标准包装： | 84 |
| 类型： | 收发器 |
| 驱动器/接收器数： | 7/7 |
| 规程： | RS232 |
| 电源电压： | 5V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 80-LQFP |
| 供应商设备封装： | 80-LQFP（14x14） |
| 包装： | 托盘 |
5
Exar Corporation 48720 Kato Road, Fremont CA, 94538 (50) 668-707 www.exar.com
SP320_00_092208
phase 4
-Vdd transfer- The fourth phase of the clock
connects the negative terminal of C2 to
ground and transfers the generated +0V
across C2 to C4, the Vdd storage capacitor.
Again, simultaneously with this, the positive
side of capacitor C is switched to +5V and
the negative side is connected to ground,
and the cycle begins again.
Since both V+ and V- are separately gener-
ated from Vcc in a no load condition, V+and
V- will be symmetrical. Older charge pump
approaches that generate V- from V+ will
show a decrease in the magnitude ofV-com-
pared to V+ due to the inherent inefficiencies
in the design.
The clock rate for the charge pump typically
operates at 5kHz. The external capaci-
tors must be 0.F with a 6V breakdown
rating.
shutdown Mode
The SP320 can be put into a low power
shutdown mode by bringing both TS000 (pin
3)andENV35(pin9)low.Inshutdownmode,
the SP320 will draw less than 2mAof supply
current. For normal operation, both pins
should be connected to +5V.
external power supplies
For applications that do not require +5V only,
external supplies can be applied at the V+
and V- pins. The value of the external supply
voltages must be no greater than ±0V.
The current drain from the ±0V sup-
plies is used for the RS-232 drivers.
For the RS-232 driver the current re-
quirement will be 3.5mA per driver.
It is critical the external power supplies
provide a power supply sequence of : +0V,
+5V, and then -0V.
Applications information
TheSP320isasinglechipdevicethatcanim-
plement a complete V.35 interface.Three (3)
V.35 drivers and three (3) V.35 receivers are
used for clock and data signals and four (4)
RS-232 (V.28) drivers and four (4) RS-232
(V.28) receivers can be used for the control
signals of the interface. The following ex-
amples show the SP320 configured in either
a DTE or DCE application.
+0V
a) C
2
+
GND
b) C
2
–
–0V
Figure . Charge Pump Waveforms
capacitors, but uses a four-phase voltage
shiftingtechniquetoattainsymmetrical±0V
powersupplies.Thecapacitorscanbeaslow
as 0.F with a 6 Volt rating. Polarized or
non-polarized capacitors can be used.
Figure (a) shows the waveform found on
the positive side of capacitor C2, and Figure
(b)showsthenegativesideofcapacitorC2.
Thereisafree-runningoscillatorthatcontrols
the four phases of the voltage shifting. A
description of each phase follows.
phase 1
-Vss charge storage- During this phase of
theclockcycle,thepositivesideofcapactors
C and C2 are initially charged to +5V. C+
is then switched to ground and the charge in
C- is transferred to C2-. Since C2+ is con-
nected to +5V, the voltage potential across
capacitor C2 is now 0V.
phase 2
-Vss transfer- Phase two of the clock con-
nects the negative terminal of C2 to the Vss
storage capacitor and the positive terminal
of C2 to ground, and transfers the generated
-0V to C3. Simultaneously, the positive side
of capacitor C is switched to +5V and the
negative side is connected to ground.
phase 3
-Vdd charge storage- The third phase of
the clock is identical to the first phase- the
transferred charge in C produces -5V in
the negative terminal of C, which is applied
to the negative side of capacitor C2. Since
C2+ is at +5V, the voltage potential across
C2 is +0V.
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