参数资料
型号: SP6121CN-L/TR
厂商: Exar Corporation
文件页数: 11/16页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM VM 8NSOIC
标准包装: 2,500
PWM 型: 电压模式
输出数: 1
频率 - 最大: 560kHz
占空比: 100%
电源电压: 3 V ~ 5.5 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: 0°C ~ 70°C
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
包装: 带卷 (TR)
APPLICATIONS INFORMATION
well as provide typical curve of R DS(ON) versus
V GS . For 5V input, use the R DS(ON) specified at
4.5V V GS . At the time of this publication, ven-
dors, such as Fairchild, Siliconix and Interna-
tional Rectifier, have started to specify R DS(ON)
at V GS less than 3V. This has provided necessary
data for designs in which these MOSFETs are
driven with 3.3V and made it possible to use
SP6121 in 3.3V only applications.
Thermal calculation must be conducted to en-
sure the MOSFET can handle the maximum
load current. The junction temperature of the
MOSFET, determined as follows, must stay
below the maximum rating.
Schottky diode alleviates this noise and addi-
tionally improves efficiency thanks to its low
forward voltage. The reverse voltage across the
diode is equal to input voltage, and the diode
must be able to handle the peak current equal to
the maximum load current.
The power dissipation of the Schottky diode is
determined by
P DIODE = 2V F I OUT T NOL F S
where;
T NOL = non-overlap time between PDRV and
NDRV.
V F = forward voltage of the Schottky diode.
T J ( max) = T A (max) +
P MOSFET (max)
R θ JA
,
where;
T A(max) = maximum ambient temperature
R1
COMP
?
P MOSFET(max) = maximum power dissipation of
the MOSFET
C2
C1
SP6121
R θ JA = junction to ambient thermal resistance.
R θ JA of the device depends greatly on the board
layout, as well as device package. Significant
thermal improvement can be achieved in the
maximum power dissipation through the proper
design of copper mounting pads on the circuit
board. For example, in a SO-8 package, plac-
ing two 0.04 square inches copper pad di-
rectly under the package, without occupying
additional board space, can increase the maxi-
mum power from approximately 1 to 1.2W.
For DPAK package, enlarging the tap mount-
ing pad to 1 square inches reduces the R θ JA
from 96 ° C/W to 40 ° C/W.
Schottky Diode Selection
When paralleled with the bottom MOSFET, an
optional Schottky diode can improve efficiency
and reduce noise. Without this Schottky diode,
the body diode of the bottom MOSFET con-
ducts the current during the non-overlap time
when both MOSFETs are turned off. Unfortu-
nately, the body diode has high forward voltage
and reverse recovery problem. The reverse re-
covery of the body diode causes additional
switching noises when the diode turns off. The
Figure 4. The RC network connected to the COMP pin
provides a pole and a zero to control loop.
Loop Compensation Design
The goal of loop compensation is to manipulate
loop frequency response such that its gain crosses
over 0db at a slope of -20db/dec. The SP6121
has a trans-conductance error amplifier and re-
quires the compensation network to be con-
nected between the COMP pin and ground, as
shown in Figure 4.
The first step of compensation design is to pick
the loop crossover frequency. High crossover
frequency is desirable for fast transient response,
but often jeopardize the system stability. Cross-
over frequency should be higher than the ESR
zero but less than 1/5 of the switching fre-
quency. The ESR zero is contributed by the ESR
Date: 11/29/04
SP6121 Low Voltage, Synchronous Step Down PWM Controller
11
? Copyright 2004 Sipex Corporation
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