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参数资料
| 型号： | SP6132HEU-L/TR |
| 厂商： | Exar Corporation |
| 文件页数： | 11/14页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM VM 10-MSOP |
| 标准包装： | 2,500 |
| PWM 型： | 电压模式 |
| 输出数： | 1 |
| 频率 - 最大： | 360kHz |
| 占空比： | 100% |
| 电源电压： | 4.5 V ~ 5.5 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 10-TFSOP，10-MSOP（0.118"，3.00mm 宽） |
| 包装： | 带卷 (TR) |
APPLICATIONS INFORMATION: Continued
The goal of loop compensation is to manipulate
loop frequency response such that its gain crosses
over 0db at a slope of -20db/dec. The first step
of compensation design is to pick the loop
crossover frequency. High crossover frequency
is desirable for fast transient response, but often
jeopardizes the system stability. Crossover fre-
quency should be higher than the ESR zero but
less than 1/5 of the switching frequency. The
ESR zero is contributed by the ESR associated
When the output capacitors are of a Ceramic
Type, the SP6132H requires a Type III compen-
sation circuit to give a phase boost of 180 ° in
order to counteract the effects of an under damped
resonance of the output filter at the double pole
frequency.
Gain
(dB)
Error Amplify Gain
with the output capacitors and can be deter-
mined by:
Condition:
C22 >> CP1, R1 >> RZ3
Bandwidth Product
? Z(ESR) =
1
20 Log (RZ2/R1)
2 π C OUT R ESR
Frequency
(Hz)
The next step is to calculate the complex conju-
gate poles contributed by the LC output filter,
Bode Plot of Type III Error Amplify Compensation.
? P(LC) =
2 π
1
L C OUT
Date:2/14/06
SP6132H High Voltage, Synchronous PWM Controller
11
? Copyright 2006 Sipex Corporation
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| SP6132HV | 制造商:SIPEX 制造商全称:Sipex Corporation 功能描述:High Voltage Synchronous Buck Controller |
| SP6133 | 制造商:SIPEX 制造商全称:Sipex Corporation 功能描述:Evaluation Board Manual |
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